diff --git a/src/shader_recompiler/runtime_info.h b/src/shader_recompiler/runtime_info.h index 03936f3a8..4662def93 100644 --- a/src/shader_recompiler/runtime_info.h +++ b/src/shader_recompiler/runtime_info.h @@ -20,7 +20,7 @@ enum class Stage : u32 { Local, Compute, }; -constexpr u32 MaxStageTypes = 6; +constexpr u32 MaxStageTypes = 7; [[nodiscard]] constexpr Stage StageFromIndex(size_t index) noexcept { return static_cast(index); diff --git a/src/video_core/buffer_cache/buffer_cache.cpp b/src/video_core/buffer_cache/buffer_cache.cpp index 42d3deba7..92c446fa9 100644 --- a/src/video_core/buffer_cache/buffer_cache.cpp +++ b/src/video_core/buffer_cache/buffer_cache.cpp @@ -620,10 +620,10 @@ void BufferCache::SynchronizeBuffer(Buffer& buffer, VAddr device_addr, u32 size, bool BufferCache::SynchronizeBufferFromImage(Buffer& buffer, VAddr device_addr, u32 size) { static constexpr FindFlags find_flags = FindFlags::NoCreate | FindFlags::RelaxDim | FindFlags::RelaxFmt | FindFlags::RelaxSize; - ImageInfo info{}; - info.guest_address = device_addr; - info.guest_size_bytes = size; - const ImageId image_id = texture_cache.FindImage(info, find_flags); + TextureCache::BaseDesc desc{}; + desc.info.guest_address = device_addr; + desc.info.guest_size_bytes = size; + const ImageId image_id = texture_cache.FindImage(desc, find_flags); if (!image_id) { return false; } diff --git a/src/video_core/renderer_vulkan/vk_compute_pipeline.cpp b/src/video_core/renderer_vulkan/vk_compute_pipeline.cpp index 4ab290780..09d4e4195 100644 --- a/src/video_core/renderer_vulkan/vk_compute_pipeline.cpp +++ b/src/video_core/renderer_vulkan/vk_compute_pipeline.cpp @@ -15,8 +15,10 @@ ComputePipeline::ComputePipeline(const Instance& instance_, Scheduler& scheduler DescriptorHeap& desc_heap_, vk::PipelineCache pipeline_cache, u64 compute_key_, const Shader::Info& info_, vk::ShaderModule module) - : Pipeline{instance_, scheduler_, desc_heap_, pipeline_cache}, compute_key{compute_key_}, - info{&info_} { + : Pipeline{instance_, scheduler_, desc_heap_, pipeline_cache, true}, compute_key{compute_key_} { + auto& info = stages[int(Shader::Stage::Compute)]; + info = &info_; + const vk::PipelineShaderStageCreateInfo shader_ci = { .stage = vk::ShaderStageFlagBits::eCompute, .module = module, @@ -118,90 +120,4 @@ ComputePipeline::ComputePipeline(const Instance& instance_, Scheduler& scheduler ComputePipeline::~ComputePipeline() = default; -bool ComputePipeline::BindResources(VideoCore::BufferCache& buffer_cache, - VideoCore::TextureCache& texture_cache) const { - // Bind resource buffers and textures. - boost::container::small_vector set_writes; - BufferBarriers buffer_barriers; - Shader::PushData push_data{}; - Shader::Backend::Bindings binding{}; - - info->PushUd(binding, push_data); - - buffer_infos.clear(); - buffer_views.clear(); - image_infos.clear(); - - // Most of the time when a metadata is updated with a shader it gets cleared. It means - // we can skip the whole dispatch and update the tracked state instead. Also, it is not - // intended to be consumed and in such rare cases (e.g. HTile introspection, CRAA) we - // will need its full emulation anyways. For cases of metadata read a warning will be logged. - const auto IsMetaUpdate = [&](const auto& desc) { - const VAddr address = desc.GetSharp(*info).base_address; - if (desc.is_written) { - if (texture_cache.TouchMeta(address, true)) { - LOG_TRACE(Render_Vulkan, "Metadata update skipped"); - return true; - } - } else { - if (texture_cache.IsMeta(address)) { - LOG_WARNING(Render_Vulkan, "Unexpected metadata read by a CS shader (buffer)"); - } - } - return false; - }; - - for (const auto& desc : info->buffers) { - if (desc.is_gds_buffer) { - continue; - } - if (IsMetaUpdate(desc)) { - return false; - } - } - for (const auto& desc : info->texture_buffers) { - if (IsMetaUpdate(desc)) { - return false; - } - } - - BindBuffers(buffer_cache, texture_cache, *info, binding, push_data, set_writes, - buffer_barriers); - - BindTextures(texture_cache, *info, binding, set_writes); - - if (set_writes.empty()) { - return false; - } - - const auto cmdbuf = scheduler.CommandBuffer(); - if (!buffer_barriers.empty()) { - const auto dependencies = vk::DependencyInfo{ - .dependencyFlags = vk::DependencyFlagBits::eByRegion, - .bufferMemoryBarrierCount = u32(buffer_barriers.size()), - .pBufferMemoryBarriers = buffer_barriers.data(), - }; - scheduler.EndRendering(); - cmdbuf.pipelineBarrier2(dependencies); - } - - cmdbuf.pushConstants(*pipeline_layout, vk::ShaderStageFlagBits::eCompute, 0u, sizeof(push_data), - &push_data); - - // Bind descriptor set. - if (uses_push_descriptors) { - cmdbuf.pushDescriptorSetKHR(vk::PipelineBindPoint::eCompute, *pipeline_layout, 0, - set_writes); - return true; - } - const auto desc_set = desc_heap.Commit(*desc_layout); - for (auto& set_write : set_writes) { - set_write.dstSet = desc_set; - } - instance.GetDevice().updateDescriptorSets(set_writes, {}); - cmdbuf.bindDescriptorSets(vk::PipelineBindPoint::eCompute, *pipeline_layout, 0, desc_set, {}); - - return true; -} - } // namespace Vulkan diff --git a/src/video_core/renderer_vulkan/vk_compute_pipeline.h b/src/video_core/renderer_vulkan/vk_compute_pipeline.h index f1bc7285a..ca429b58d 100644 --- a/src/video_core/renderer_vulkan/vk_compute_pipeline.h +++ b/src/video_core/renderer_vulkan/vk_compute_pipeline.h @@ -24,13 +24,8 @@ public: vk::ShaderModule module); ~ComputePipeline(); - bool BindResources(VideoCore::BufferCache& buffer_cache, - VideoCore::TextureCache& texture_cache) const; - private: u64 compute_key; - const Shader::Info* info; - bool uses_push_descriptors{}; }; } // namespace Vulkan diff --git a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp index 32e3bf8f8..d0d16ac75 100644 --- a/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp +++ b/src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp @@ -16,10 +16,6 @@ namespace Vulkan { -static constexpr auto gp_stage_flags = vk::ShaderStageFlagBits::eVertex | - vk::ShaderStageFlagBits::eGeometry | - vk::ShaderStageFlagBits::eFragment; - GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& scheduler_, DescriptorHeap& desc_heap_, const GraphicsPipelineKey& key_, vk::PipelineCache pipeline_cache, @@ -389,67 +385,4 @@ void GraphicsPipeline::BuildDescSetLayout() { desc_layout = std::move(layout); } -void GraphicsPipeline::BindResources(const Liverpool::Regs& regs, - VideoCore::BufferCache& buffer_cache, - VideoCore::TextureCache& texture_cache) const { - // Bind resource buffers and textures. - boost::container::small_vector set_writes; - BufferBarriers buffer_barriers; - Shader::PushData push_data{}; - Shader::Backend::Bindings binding{}; - - buffer_infos.clear(); - buffer_views.clear(); - image_infos.clear(); - - for (const auto* stage : stages) { - if (!stage) { - continue; - } - if (stage->uses_step_rates) { - push_data.step0 = regs.vgt_instance_step_rate_0; - push_data.step1 = regs.vgt_instance_step_rate_1; - } - stage->PushUd(binding, push_data); - - BindBuffers(buffer_cache, texture_cache, *stage, binding, push_data, set_writes, - buffer_barriers); - - BindTextures(texture_cache, *stage, binding, set_writes); - } - - const auto cmdbuf = scheduler.CommandBuffer(); - SCOPE_EXIT { - cmdbuf.pushConstants(*pipeline_layout, gp_stage_flags, 0U, sizeof(push_data), &push_data); - cmdbuf.bindPipeline(vk::PipelineBindPoint::eGraphics, Handle()); - }; - - if (set_writes.empty()) { - return; - } - - if (!buffer_barriers.empty()) { - const auto dependencies = vk::DependencyInfo{ - .dependencyFlags = vk::DependencyFlagBits::eByRegion, - .bufferMemoryBarrierCount = u32(buffer_barriers.size()), - .pBufferMemoryBarriers = buffer_barriers.data(), - }; - scheduler.EndRendering(); - cmdbuf.pipelineBarrier2(dependencies); - } - - // Bind descriptor set. - if (uses_push_descriptors) { - cmdbuf.pushDescriptorSetKHR(vk::PipelineBindPoint::eGraphics, *pipeline_layout, 0, - set_writes); - return; - } - const auto desc_set = desc_heap.Commit(*desc_layout); - for (auto& set_write : set_writes) { - set_write.dstSet = desc_set; - } - instance.GetDevice().updateDescriptorSets(set_writes, {}); - cmdbuf.bindDescriptorSets(vk::PipelineBindPoint::eGraphics, *pipeline_layout, 0, desc_set, {}); -} - } // namespace Vulkan diff --git a/src/video_core/renderer_vulkan/vk_graphics_pipeline.h b/src/video_core/renderer_vulkan/vk_graphics_pipeline.h index f7762eb12..4f4abfd16 100644 --- a/src/video_core/renderer_vulkan/vk_graphics_pipeline.h +++ b/src/video_core/renderer_vulkan/vk_graphics_pipeline.h @@ -2,6 +2,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later #include + #include "common/types.h" #include "video_core/renderer_vulkan/liverpool_to_vk.h" #include "video_core/renderer_vulkan/vk_common.h" @@ -14,8 +15,8 @@ class TextureCache; namespace Vulkan { -static constexpr u32 MaxVertexBufferCount = 32; static constexpr u32 MaxShaderStages = 5; +static constexpr u32 MaxVertexBufferCount = 32; class Instance; class Scheduler; @@ -61,13 +62,6 @@ public: std::span modules); ~GraphicsPipeline(); - void BindResources(const Liverpool::Regs& regs, VideoCore::BufferCache& buffer_cache, - VideoCore::TextureCache& texture_cache) const; - - const Shader::Info& GetStage(Shader::Stage stage) const noexcept { - return *stages[u32(stage)]; - } - bool IsEmbeddedVs() const noexcept { static constexpr size_t EmbeddedVsHash = 0x9b2da5cf47f8c29f; return key.stage_hashes[u32(Shader::Stage::Vertex)] == EmbeddedVsHash; @@ -99,9 +93,7 @@ private: void BuildDescSetLayout(); private: - std::array stages{}; GraphicsPipelineKey key; - bool uses_push_descriptors{}; }; } // namespace Vulkan diff --git a/src/video_core/renderer_vulkan/vk_pipeline_cache.h b/src/video_core/renderer_vulkan/vk_pipeline_cache.h index 7e44bbf09..43facbae4 100644 --- a/src/video_core/renderer_vulkan/vk_pipeline_cache.h +++ b/src/video_core/renderer_vulkan/vk_pipeline_cache.h @@ -38,8 +38,6 @@ struct Program { }; class PipelineCache { - static constexpr size_t MaxShaderStages = 5; - public: explicit PipelineCache(const Instance& instance, Scheduler& scheduler, AmdGpu::Liverpool* liverpool); diff --git a/src/video_core/renderer_vulkan/vk_pipeline_common.cpp b/src/video_core/renderer_vulkan/vk_pipeline_common.cpp index 4c297cd42..6b48a40a0 100644 --- a/src/video_core/renderer_vulkan/vk_pipeline_common.cpp +++ b/src/video_core/renderer_vulkan/vk_pipeline_common.cpp @@ -12,230 +12,47 @@ namespace Vulkan { -boost::container::static_vector Pipeline::image_infos; -boost::container::static_vector Pipeline::buffer_views; -boost::container::static_vector Pipeline::buffer_infos; - Pipeline::Pipeline(const Instance& instance_, Scheduler& scheduler_, DescriptorHeap& desc_heap_, - vk::PipelineCache pipeline_cache) - : instance{instance_}, scheduler{scheduler_}, desc_heap{desc_heap_} {} + vk::PipelineCache pipeline_cache, bool is_compute_ /*= false*/) + : instance{instance_}, scheduler{scheduler_}, desc_heap{desc_heap_}, is_compute{is_compute_} {} Pipeline::~Pipeline() = default; -void Pipeline::BindBuffers(VideoCore::BufferCache& buffer_cache, - VideoCore::TextureCache& texture_cache, const Shader::Info& stage, - Shader::Backend::Bindings& binding, Shader::PushData& push_data, - DescriptorWrites& set_writes, BufferBarriers& buffer_barriers) const { - using BufferBindingInfo = std::pair; - static boost::container::static_vector buffer_bindings; +void Pipeline::BindResources(DescriptorWrites& set_writes, const BufferBarriers& buffer_barriers, + const Shader::PushData& push_data) const { + const auto cmdbuf = scheduler.CommandBuffer(); + const auto bind_point = + IsCompute() ? vk::PipelineBindPoint::eCompute : vk::PipelineBindPoint::eGraphics; - buffer_bindings.clear(); - - for (const auto& desc : stage.buffers) { - const auto vsharp = desc.GetSharp(stage); - if (!desc.is_gds_buffer && vsharp.base_address != 0 && vsharp.GetSize() > 0) { - const auto buffer_id = buffer_cache.FindBuffer(vsharp.base_address, vsharp.GetSize()); - buffer_bindings.emplace_back(buffer_id, vsharp); - } else { - buffer_bindings.emplace_back(VideoCore::BufferId{}, vsharp); - } + if (!buffer_barriers.empty()) { + const auto dependencies = vk::DependencyInfo{ + .dependencyFlags = vk::DependencyFlagBits::eByRegion, + .bufferMemoryBarrierCount = u32(buffer_barriers.size()), + .pBufferMemoryBarriers = buffer_barriers.data(), + }; + scheduler.EndRendering(); + cmdbuf.pipelineBarrier2(dependencies); } - using TexBufferBindingInfo = std::pair; - static boost::container::static_vector texbuffer_bindings; + const auto stage_flags = IsCompute() ? vk::ShaderStageFlagBits::eCompute : gp_stage_flags; + cmdbuf.pushConstants(*pipeline_layout, stage_flags, 0u, sizeof(push_data), &push_data); - texbuffer_bindings.clear(); - - for (const auto& desc : stage.texture_buffers) { - const auto vsharp = desc.GetSharp(stage); - if (vsharp.base_address != 0 && vsharp.GetSize() > 0 && - vsharp.GetDataFmt() != AmdGpu::DataFormat::FormatInvalid) { - const auto buffer_id = buffer_cache.FindBuffer(vsharp.base_address, vsharp.GetSize()); - texbuffer_bindings.emplace_back(buffer_id, vsharp); - } else { - texbuffer_bindings.emplace_back(VideoCore::BufferId{}, vsharp); - } + // Bind descriptor set. + if (set_writes.empty()) { + return; } - // Bind the flattened user data buffer as a UBO so it's accessible to the shader - if (stage.has_readconst) { - const auto [vk_buffer, offset] = buffer_cache.ObtainHostUBO(stage.flattened_ud_buf); - buffer_infos.emplace_back(vk_buffer->Handle(), offset, - stage.flattened_ud_buf.size() * sizeof(u32)); - set_writes.push_back({ - .dstSet = VK_NULL_HANDLE, - .dstBinding = binding.unified++, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = vk::DescriptorType::eUniformBuffer, - .pBufferInfo = &buffer_infos.back(), - }); - ++binding.buffer; + if (uses_push_descriptors) { + cmdbuf.pushDescriptorSetKHR(bind_point, *pipeline_layout, 0, set_writes); + return; } - // Second pass to re-bind buffers that were updated after binding - for (u32 i = 0; i < buffer_bindings.size(); i++) { - const auto& [buffer_id, vsharp] = buffer_bindings[i]; - const auto& desc = stage.buffers[i]; - const bool is_storage = desc.IsStorage(vsharp); - if (!buffer_id) { - if (desc.is_gds_buffer) { - const auto* gds_buf = buffer_cache.GetGdsBuffer(); - buffer_infos.emplace_back(gds_buf->Handle(), 0, gds_buf->SizeBytes()); - } else if (instance.IsNullDescriptorSupported()) { - buffer_infos.emplace_back(VK_NULL_HANDLE, 0, VK_WHOLE_SIZE); - } else { - auto& null_buffer = buffer_cache.GetBuffer(VideoCore::NULL_BUFFER_ID); - buffer_infos.emplace_back(null_buffer.Handle(), 0, VK_WHOLE_SIZE); - } - } else { - const auto [vk_buffer, offset] = buffer_cache.ObtainBuffer( - vsharp.base_address, vsharp.GetSize(), desc.is_written, false, buffer_id); - const u32 alignment = - is_storage ? instance.StorageMinAlignment() : instance.UniformMinAlignment(); - const u32 offset_aligned = Common::AlignDown(offset, alignment); - const u32 adjust = offset - offset_aligned; - ASSERT(adjust % 4 == 0); - push_data.AddOffset(binding.buffer, adjust); - buffer_infos.emplace_back(vk_buffer->Handle(), offset_aligned, - vsharp.GetSize() + adjust); - } - - set_writes.push_back({ - .dstSet = VK_NULL_HANDLE, - .dstBinding = binding.unified++, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = is_storage ? vk::DescriptorType::eStorageBuffer - : vk::DescriptorType::eUniformBuffer, - .pBufferInfo = &buffer_infos.back(), - }); - ++binding.buffer; - } - - const auto null_buffer_view = - instance.IsNullDescriptorSupported() ? VK_NULL_HANDLE : buffer_cache.NullBufferView(); - for (u32 i = 0; i < texbuffer_bindings.size(); i++) { - const auto& [buffer_id, vsharp] = texbuffer_bindings[i]; - const auto& desc = stage.texture_buffers[i]; - vk::BufferView& buffer_view = buffer_views.emplace_back(null_buffer_view); - if (buffer_id) { - const u32 alignment = instance.TexelBufferMinAlignment(); - const auto [vk_buffer, offset] = buffer_cache.ObtainBuffer( - vsharp.base_address, vsharp.GetSize(), desc.is_written, true, buffer_id); - const u32 fmt_stride = AmdGpu::NumBits(vsharp.GetDataFmt()) >> 3; - ASSERT_MSG(fmt_stride == vsharp.GetStride(), - "Texel buffer stride must match format stride"); - const u32 offset_aligned = Common::AlignDown(offset, alignment); - const u32 adjust = offset - offset_aligned; - ASSERT(adjust % fmt_stride == 0); - push_data.AddOffset(binding.buffer, adjust / fmt_stride); - buffer_view = - vk_buffer->View(offset_aligned, vsharp.GetSize() + adjust, desc.is_written, - vsharp.GetDataFmt(), vsharp.GetNumberFmt()); - if (auto barrier = - vk_buffer->GetBarrier(desc.is_written ? vk::AccessFlagBits2::eShaderWrite - : vk::AccessFlagBits2::eShaderRead, - vk::PipelineStageFlagBits2::eComputeShader)) { - buffer_barriers.emplace_back(*barrier); - } - if (desc.is_written) { - texture_cache.InvalidateMemoryFromGPU(vsharp.base_address, vsharp.GetSize()); - } - } - - set_writes.push_back({ - .dstSet = VK_NULL_HANDLE, - .dstBinding = binding.unified++, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = desc.is_written ? vk::DescriptorType::eStorageTexelBuffer - : vk::DescriptorType::eUniformTexelBuffer, - .pTexelBufferView = &buffer_view, - }); - ++binding.buffer; - } -} - -void Pipeline::BindTextures(VideoCore::TextureCache& texture_cache, const Shader::Info& stage, - Shader::Backend::Bindings& binding, - DescriptorWrites& set_writes) const { - - using ImageBindingInfo = std::tuple; - static boost::container::static_vector image_bindings; - - image_bindings.clear(); - - for (const auto& image_desc : stage.images) { - const auto tsharp = image_desc.GetSharp(stage); - if (tsharp.GetDataFmt() != AmdGpu::DataFormat::FormatInvalid) { - VideoCore::ImageInfo image_info{tsharp, image_desc}; - const auto image_id = texture_cache.FindImage(image_info); - auto& image = texture_cache.GetImage(image_id); - image.flags |= VideoCore::ImageFlagBits::Bound; - image_bindings.emplace_back(image_id, tsharp, image_desc); - } else { - image_bindings.emplace_back(VideoCore::ImageId{}, tsharp, image_desc); - } - - if (texture_cache.IsMeta(tsharp.Address())) { - LOG_WARNING(Render_Vulkan, "Unexpected metadata read by a PS shader (texture)"); - } - } - - // Second pass to re-bind images that were updated after binding - for (auto [image_id, tsharp, desc] : image_bindings) { - if (!image_id) { - if (instance.IsNullDescriptorSupported()) { - image_infos.emplace_back(VK_NULL_HANDLE, VK_NULL_HANDLE, vk::ImageLayout::eGeneral); - } else { - auto& null_image = texture_cache.GetImageView(VideoCore::NULL_IMAGE_VIEW_ID); - image_infos.emplace_back(VK_NULL_HANDLE, *null_image.image_view, - vk::ImageLayout::eGeneral); - } - } else { - auto& image = texture_cache.GetImage(image_id); - if (True(image.flags & VideoCore::ImageFlagBits::NeedsRebind)) { - image_id = texture_cache.FindImage(image.info); - } - VideoCore::ImageViewInfo view_info{tsharp, desc}; - auto& image_view = texture_cache.FindTexture(image_id, view_info); - image_infos.emplace_back(VK_NULL_HANDLE, *image_view.image_view, - texture_cache.GetImage(image_id).last_state.layout); - image.flags &= - ~(VideoCore::ImageFlagBits::NeedsRebind | VideoCore::ImageFlagBits::Bound); - } - - set_writes.push_back({ - .dstSet = VK_NULL_HANDLE, - .dstBinding = binding.unified++, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = desc.is_storage ? vk::DescriptorType::eStorageImage - : vk::DescriptorType::eSampledImage, - .pImageInfo = &image_infos.back(), - }); - } - - for (const auto& sampler : stage.samplers) { - auto ssharp = sampler.GetSharp(stage); - if (sampler.disable_aniso) { - const auto& tsharp = stage.images[sampler.associated_image].GetSharp(stage); - if (tsharp.base_level == 0 && tsharp.last_level == 0) { - ssharp.max_aniso.Assign(AmdGpu::AnisoRatio::One); - } - } - const auto vk_sampler = texture_cache.GetSampler(ssharp); - image_infos.emplace_back(vk_sampler, VK_NULL_HANDLE, vk::ImageLayout::eGeneral); - set_writes.push_back({ - .dstSet = VK_NULL_HANDLE, - .dstBinding = binding.unified++, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = vk::DescriptorType::eSampler, - .pImageInfo = &image_infos.back(), - }); + const auto desc_set = desc_heap.Commit(*desc_layout); + for (auto& set_write : set_writes) { + set_write.dstSet = desc_set; } + instance.GetDevice().updateDescriptorSets(set_writes, {}); + cmdbuf.bindDescriptorSets(bind_point, *pipeline_layout, 0, desc_set, {}); } } // namespace Vulkan diff --git a/src/video_core/renderer_vulkan/vk_pipeline_common.h b/src/video_core/renderer_vulkan/vk_pipeline_common.h index 75764bfa6..8c48c83f7 100644 --- a/src/video_core/renderer_vulkan/vk_pipeline_common.h +++ b/src/video_core/renderer_vulkan/vk_pipeline_common.h @@ -6,14 +6,18 @@ #include "shader_recompiler/backend/bindings.h" #include "shader_recompiler/info.h" #include "video_core/renderer_vulkan/vk_common.h" +#include "video_core/texture_cache/texture_cache.h" namespace VideoCore { class BufferCache; -class TextureCache; } // namespace VideoCore namespace Vulkan { +static constexpr auto gp_stage_flags = vk::ShaderStageFlagBits::eVertex | + vk::ShaderStageFlagBits::eGeometry | + vk::ShaderStageFlagBits::eFragment; + class Instance; class Scheduler; class DescriptorHeap; @@ -21,7 +25,7 @@ class DescriptorHeap; class Pipeline { public: Pipeline(const Instance& instance, Scheduler& scheduler, DescriptorHeap& desc_heap, - vk::PipelineCache pipeline_cache); + vk::PipelineCache pipeline_cache, bool is_compute = false); virtual ~Pipeline(); vk::Pipeline Handle() const noexcept { @@ -32,16 +36,27 @@ public: return *pipeline_layout; } + auto GetStages() const { + if (is_compute) { + return std::span{stages.cend() - 1, stages.cend()}; + } else { + return std::span{stages.cbegin(), stages.cend() - 1}; + } + } + + const Shader::Info& GetStage(Shader::Stage stage) const noexcept { + return *stages[u32(stage)]; + } + + bool IsCompute() const { + return is_compute; + } + using DescriptorWrites = boost::container::small_vector; using BufferBarriers = boost::container::small_vector; - void BindBuffers(VideoCore::BufferCache& buffer_cache, VideoCore::TextureCache& texture_cache, - const Shader::Info& stage, Shader::Backend::Bindings& binding, - Shader::PushData& push_data, DescriptorWrites& set_writes, - BufferBarriers& buffer_barriers) const; - - void BindTextures(VideoCore::TextureCache& texture_cache, const Shader::Info& stage, - Shader::Backend::Bindings& binding, DescriptorWrites& set_writes) const; + void BindResources(DescriptorWrites& set_writes, const BufferBarriers& buffer_barriers, + const Shader::PushData& push_data) const; protected: const Instance& instance; @@ -50,9 +65,9 @@ protected: vk::UniquePipeline pipeline; vk::UniquePipelineLayout pipeline_layout; vk::UniqueDescriptorSetLayout desc_layout; - static boost::container::static_vector image_infos; - static boost::container::static_vector buffer_views; - static boost::container::static_vector buffer_infos; + std::array stages{}; + bool uses_push_descriptors{}; + const bool is_compute; }; } // namespace Vulkan diff --git a/src/video_core/renderer_vulkan/vk_presenter.h b/src/video_core/renderer_vulkan/vk_presenter.h index cb44a352a..4d9226dec 100644 --- a/src/video_core/renderer_vulkan/vk_presenter.h +++ b/src/video_core/renderer_vulkan/vk_presenter.h @@ -55,8 +55,8 @@ public: Frame* PrepareFrame(const Libraries::VideoOut::BufferAttributeGroup& attribute, VAddr cpu_address, bool is_eop) { - const auto info = VideoCore::ImageInfo{attribute, cpu_address}; - const auto image_id = texture_cache.FindImage(info); + auto desc = VideoCore::TextureCache::VideoOutDesc{attribute, cpu_address}; + const auto image_id = texture_cache.FindImage(desc); texture_cache.UpdateImage(image_id, is_eop ? nullptr : &flip_scheduler); return PrepareFrameInternal(image_id, is_eop); } @@ -68,9 +68,11 @@ public: VideoCore::Image& RegisterVideoOutSurface( const Libraries::VideoOut::BufferAttributeGroup& attribute, VAddr cpu_address) { vo_buffers_addr.emplace_back(cpu_address); - const auto info = VideoCore::ImageInfo{attribute, cpu_address}; - const auto image_id = texture_cache.FindImage(info); - return texture_cache.GetImage(image_id); + auto desc = VideoCore::TextureCache::VideoOutDesc{attribute, cpu_address}; + const auto image_id = texture_cache.FindImage(desc); + auto& image = texture_cache.GetImage(image_id); + image.usage.vo_surface = 1u; + return image; } bool IsVideoOutSurface(const AmdGpu::Liverpool::ColorBuffer& color_buffer) { diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp index 3c4012a26..98e41fea7 100644 --- a/src/video_core/renderer_vulkan/vk_rasterizer.cpp +++ b/src/video_core/renderer_vulkan/vk_rasterizer.cpp @@ -75,6 +75,105 @@ bool Rasterizer::FilterDraw() { return true; } +RenderState Rasterizer::PrepareRenderState(u32 mrt_mask) { + // Prefetch color and depth buffers to let texture cache handle possible overlaps with bound + // textures (e.g. mipgen) + RenderState state; + + cb_descs.clear(); + db_desc.reset(); + + const auto& regs = liverpool->regs; + + if (regs.color_control.degamma_enable) { + LOG_WARNING(Render_Vulkan, "Color buffers require gamma correction"); + } + + for (auto col_buf_id = 0u; col_buf_id < Liverpool::NumColorBuffers; ++col_buf_id) { + const auto& col_buf = regs.color_buffers[col_buf_id]; + if (!col_buf) { + continue; + } + + // If the color buffer is still bound but rendering to it is disabled by the target + // mask, we need to prevent the render area from being affected by unbound render target + // extents. + if (!regs.color_target_mask.GetMask(col_buf_id)) { + continue; + } + + // Skip stale color buffers if shader doesn't output to them. Otherwise it will perform + // an unnecessary transition and may result in state conflict if the resource is already + // bound for reading. + if ((mrt_mask & (1 << col_buf_id)) == 0) { + continue; + } + + const bool is_clear = texture_cache.IsMetaCleared(col_buf.CmaskAddress()); + texture_cache.TouchMeta(col_buf.CmaskAddress(), false); + + const auto& hint = liverpool->last_cb_extent[col_buf_id]; + auto& [image_id, desc] = cb_descs.emplace_back(std::piecewise_construct, std::tuple{}, + std::tuple{col_buf, hint}); + const auto& image_view = texture_cache.FindRenderTarget(desc); + image_id = bound_images.emplace_back(image_view.image_id); + auto& image = texture_cache.GetImage(image_id); + image.binding.is_target = 1u; + + const auto mip = image_view.info.range.base.level; + state.width = std::min(state.width, std::max(image.info.size.width >> mip, 1u)); + state.height = std::min(state.height, std::max(image.info.size.height >> mip, 1u)); + state.color_images[state.num_color_attachments] = image.image; + state.color_attachments[state.num_color_attachments++] = { + .imageView = *image_view.image_view, + .imageLayout = vk::ImageLayout::eUndefined, + .loadOp = is_clear ? vk::AttachmentLoadOp::eClear : vk::AttachmentLoadOp::eLoad, + .storeOp = vk::AttachmentStoreOp::eStore, + .clearValue = + is_clear ? LiverpoolToVK::ColorBufferClearValue(col_buf) : vk::ClearValue{}, + }; + } + + using ZFormat = AmdGpu::Liverpool::DepthBuffer::ZFormat; + using StencilFormat = AmdGpu::Liverpool::DepthBuffer::StencilFormat; + if (regs.depth_buffer.Address() != 0 && + ((regs.depth_control.depth_enable && regs.depth_buffer.z_info.format != ZFormat::Invalid) || + (regs.depth_control.stencil_enable && + regs.depth_buffer.stencil_info.format != StencilFormat::Invalid))) { + const auto htile_address = regs.depth_htile_data_base.GetAddress(); + const bool is_clear = regs.depth_render_control.depth_clear_enable || + texture_cache.IsMetaCleared(htile_address); + const auto& hint = liverpool->last_db_extent; + auto& [image_id, desc] = + db_desc.emplace(std::piecewise_construct, std::tuple{}, + std::tuple{regs.depth_buffer, regs.depth_view, regs.depth_control, + htile_address, hint}); + const auto& image_view = texture_cache.FindDepthTarget(desc); + image_id = bound_images.emplace_back(image_view.image_id); + auto& image = texture_cache.GetImage(image_id); + image.binding.is_target = 1u; + + state.width = std::min(state.width, image.info.size.width); + state.height = std::min(state.height, image.info.size.height); + state.depth_image = image.image; + state.depth_attachment = { + .imageView = *image_view.image_view, + .imageLayout = vk::ImageLayout::eUndefined, + .loadOp = is_clear ? vk::AttachmentLoadOp::eClear : vk::AttachmentLoadOp::eLoad, + .storeOp = vk::AttachmentStoreOp::eStore, + .clearValue = vk::ClearValue{.depthStencil = {.depth = regs.depth_clear, + .stencil = regs.stencil_clear}}, + }; + texture_cache.TouchMeta(htile_address, false); + state.has_depth = + regs.depth_buffer.z_info.format != AmdGpu::Liverpool::DepthBuffer::ZFormat::Invalid; + state.has_stencil = regs.depth_buffer.stencil_info.format != + AmdGpu::Liverpool::DepthBuffer::StencilFormat::Invalid; + } + + return state; +} + void Rasterizer::Draw(bool is_indexed, u32 index_offset) { RENDERER_TRACE; @@ -82,28 +181,30 @@ void Rasterizer::Draw(bool is_indexed, u32 index_offset) { return; } - const auto cmdbuf = scheduler.CommandBuffer(); const auto& regs = liverpool->regs; const GraphicsPipeline* pipeline = pipeline_cache.GetGraphicsPipeline(); if (!pipeline) { return; } - try { - pipeline->BindResources(regs, buffer_cache, texture_cache); - } catch (...) { - UNREACHABLE(); + auto state = PrepareRenderState(pipeline->GetMrtMask()); + + if (!BindResources(pipeline)) { + return; } const auto& vs_info = pipeline->GetStage(Shader::Stage::Vertex); buffer_cache.BindVertexBuffers(vs_info); const u32 num_indices = buffer_cache.BindIndexBuffer(is_indexed, index_offset); - BeginRendering(*pipeline); + BeginRendering(*pipeline, state); UpdateDynamicState(*pipeline); const auto [vertex_offset, instance_offset] = vs_info.GetDrawOffsets(); + const auto cmdbuf = scheduler.CommandBuffer(); + cmdbuf.bindPipeline(vk::PipelineBindPoint::eGraphics, pipeline->Handle()); + if (is_indexed) { cmdbuf.drawIndexed(num_indices, regs.num_instances.NumInstances(), 0, s32(vertex_offset), instance_offset); @@ -113,6 +214,8 @@ void Rasterizer::Draw(bool is_indexed, u32 index_offset) { cmdbuf.draw(num_vertices, regs.num_instances.NumInstances(), vertex_offset, instance_offset); } + + ResetBindings(); } void Rasterizer::DrawIndirect(bool is_indexed, VAddr arg_address, u32 offset, u32 stride, @@ -123,19 +226,19 @@ void Rasterizer::DrawIndirect(bool is_indexed, VAddr arg_address, u32 offset, u3 return; } - const auto& regs = liverpool->regs; const GraphicsPipeline* pipeline = pipeline_cache.GetGraphicsPipeline(); if (!pipeline) { return; } + auto state = PrepareRenderState(pipeline->GetMrtMask()); + + const auto& regs = liverpool->regs; ASSERT_MSG(regs.primitive_type != AmdGpu::PrimitiveType::RectList, "Unsupported primitive type for indirect draw"); - try { - pipeline->BindResources(regs, buffer_cache, texture_cache); - } catch (...) { - UNREACHABLE(); + if (!BindResources(pipeline)) { + return; } const auto& vs_info = pipeline->GetStage(Shader::Stage::Vertex); @@ -151,13 +254,15 @@ void Rasterizer::DrawIndirect(bool is_indexed, VAddr arg_address, u32 offset, u3 std::tie(count_buffer, count_base) = buffer_cache.ObtainBuffer(count_address, 4, false); } - BeginRendering(*pipeline); + BeginRendering(*pipeline, state); UpdateDynamicState(*pipeline); // We can safely ignore both SGPR UD indices and results of fetch shader parsing, as vertex and // instance offsets will be automatically applied by Vulkan from indirect args buffer. const auto cmdbuf = scheduler.CommandBuffer(); + cmdbuf.bindPipeline(vk::PipelineBindPoint::eGraphics, pipeline->Handle()); + if (is_indexed) { ASSERT(sizeof(VkDrawIndexedIndirectCommand) == stride); @@ -177,6 +282,8 @@ void Rasterizer::DrawIndirect(bool is_indexed, VAddr arg_address, u32 offset, u3 cmdbuf.drawIndirect(buffer->Handle(), base, max_count, stride); } } + + ResetBindings(); } void Rasterizer::DispatchDirect() { @@ -189,18 +296,15 @@ void Rasterizer::DispatchDirect() { return; } - try { - const auto has_resources = pipeline->BindResources(buffer_cache, texture_cache); - if (!has_resources) { - return; - } - } catch (...) { - UNREACHABLE(); + if (!BindResources(pipeline)) { + return; } scheduler.EndRendering(); cmdbuf.bindPipeline(vk::PipelineBindPoint::eCompute, pipeline->Handle()); cmdbuf.dispatch(cs_program.dim_x, cs_program.dim_y, cs_program.dim_z); + + ResetBindings(); } void Rasterizer::DispatchIndirect(VAddr address, u32 offset, u32 size) { @@ -213,19 +317,16 @@ void Rasterizer::DispatchIndirect(VAddr address, u32 offset, u32 size) { return; } - try { - const auto has_resources = pipeline->BindResources(buffer_cache, texture_cache); - if (!has_resources) { - return; - } - } catch (...) { - UNREACHABLE(); + if (!BindResources(pipeline)) { + return; } scheduler.EndRendering(); cmdbuf.bindPipeline(vk::PipelineBindPoint::eCompute, pipeline->Handle()); const auto [buffer, base] = buffer_cache.ObtainBuffer(address + offset, size, false); cmdbuf.dispatchIndirect(buffer->Handle(), base); + + ResetBindings(); } u64 Rasterizer::Flush() { @@ -239,86 +340,386 @@ void Rasterizer::Finish() { scheduler.Finish(); } -void Rasterizer::BeginRendering(const GraphicsPipeline& pipeline) { +bool Rasterizer::BindResources(const Pipeline* pipeline) { + buffer_infos.clear(); + buffer_views.clear(); + image_infos.clear(); + const auto& regs = liverpool->regs; - RenderState state; - if (regs.color_control.degamma_enable) { - LOG_WARNING(Render_Vulkan, "Color buffers require gamma correction"); - } + if (pipeline->IsCompute()) { + const auto& info = pipeline->GetStage(Shader::Stage::Compute); - for (auto col_buf_id = 0u; col_buf_id < Liverpool::NumColorBuffers; ++col_buf_id) { - const auto& col_buf = regs.color_buffers[col_buf_id]; - if (!col_buf) { - continue; - } - - // If the color buffer is still bound but rendering to it is disabled by the target mask, - // we need to prevent the render area from being affected by unbound render target extents. - if (!regs.color_target_mask.GetMask(col_buf_id)) { - continue; - } - - // Skip stale color buffers if shader doesn't output to them. Otherwise it will perform - // an unnecessary transition and may result in state conflict if the resource is already - // bound for reading. - if ((pipeline.GetMrtMask() & (1 << col_buf_id)) == 0) { - continue; - } - - const auto& hint = liverpool->last_cb_extent[col_buf_id]; - VideoCore::ImageInfo image_info{col_buf, hint}; - VideoCore::ImageViewInfo view_info{col_buf}; - const auto& image_view = texture_cache.FindRenderTarget(image_info, view_info); - const auto& image = texture_cache.GetImage(image_view.image_id); - state.width = std::min(state.width, image.info.size.width); - state.height = std::min(state.height, image.info.size.height); - - const bool is_clear = texture_cache.IsMetaCleared(col_buf.CmaskAddress()); - state.color_images[state.num_color_attachments] = image.image; - state.color_attachments[state.num_color_attachments++] = { - .imageView = *image_view.image_view, - .imageLayout = vk::ImageLayout::eColorAttachmentOptimal, - .loadOp = is_clear ? vk::AttachmentLoadOp::eClear : vk::AttachmentLoadOp::eLoad, - .storeOp = vk::AttachmentStoreOp::eStore, - .clearValue = - is_clear ? LiverpoolToVK::ColorBufferClearValue(col_buf) : vk::ClearValue{}, + // Most of the time when a metadata is updated with a shader it gets cleared. It means + // we can skip the whole dispatch and update the tracked state instead. Also, it is not + // intended to be consumed and in such rare cases (e.g. HTile introspection, CRAA) we + // will need its full emulation anyways. For cases of metadata read a warning will be + // logged. + const auto IsMetaUpdate = [&](const auto& desc) { + const VAddr address = desc.GetSharp(info).base_address; + if (desc.is_written) { + if (texture_cache.TouchMeta(address, true)) { + LOG_TRACE(Render_Vulkan, "Metadata update skipped"); + return true; + } + } else { + if (texture_cache.IsMeta(address)) { + LOG_WARNING(Render_Vulkan, "Unexpected metadata read by a CS shader (buffer)"); + } + } + return false; }; - texture_cache.TouchMeta(col_buf.CmaskAddress(), false); + + for (const auto& desc : info.buffers) { + if (desc.is_gds_buffer) { + continue; + } + if (IsMetaUpdate(desc)) { + return false; + } + } + for (const auto& desc : info.texture_buffers) { + if (IsMetaUpdate(desc)) { + return false; + } + } } - using ZFormat = AmdGpu::Liverpool::DepthBuffer::ZFormat; - using StencilFormat = AmdGpu::Liverpool::DepthBuffer::StencilFormat; - if (regs.depth_buffer.Address() != 0 && - ((regs.depth_control.depth_enable && regs.depth_buffer.z_info.format != ZFormat::Invalid) || - (regs.depth_control.stencil_enable && - regs.depth_buffer.stencil_info.format != StencilFormat::Invalid))) { - const auto htile_address = regs.depth_htile_data_base.GetAddress(); - const bool is_clear = regs.depth_render_control.depth_clear_enable || - texture_cache.IsMetaCleared(htile_address); - const auto& hint = liverpool->last_db_extent; - VideoCore::ImageInfo image_info{regs.depth_buffer, regs.depth_view.NumSlices(), - htile_address, hint}; - VideoCore::ImageViewInfo view_info{regs.depth_buffer, regs.depth_view, regs.depth_control}; - const auto& image_view = texture_cache.FindDepthTarget(image_info, view_info); - const auto& image = texture_cache.GetImage(image_view.image_id); - state.width = std::min(state.width, image.info.size.width); - state.height = std::min(state.height, image.info.size.height); - state.depth_image = image.image; - state.depth_attachment = { - .imageView = *image_view.image_view, - .imageLayout = image.last_state.layout, - .loadOp = is_clear ? vk::AttachmentLoadOp::eClear : vk::AttachmentLoadOp::eLoad, - .storeOp = is_clear ? vk::AttachmentStoreOp::eNone : vk::AttachmentStoreOp::eStore, - .clearValue = vk::ClearValue{.depthStencil = {.depth = regs.depth_clear, - .stencil = regs.stencil_clear}}, - }; - texture_cache.TouchMeta(htile_address, false); - state.has_depth = - regs.depth_buffer.z_info.format != AmdGpu::Liverpool::DepthBuffer::ZFormat::Invalid; - state.has_stencil = regs.depth_buffer.stencil_info.format != - AmdGpu::Liverpool::DepthBuffer::StencilFormat::Invalid; + set_writes.clear(); + buffer_barriers.clear(); + + // Bind resource buffers and textures. + Shader::PushData push_data{}; + Shader::Backend::Bindings binding{}; + + for (const auto* stage : pipeline->GetStages()) { + if (!stage) { + continue; + } + if (stage->uses_step_rates) { + push_data.step0 = regs.vgt_instance_step_rate_0; + push_data.step1 = regs.vgt_instance_step_rate_1; + } + stage->PushUd(binding, push_data); + + BindBuffers(*stage, binding, push_data, set_writes, buffer_barriers); + BindTextures(*stage, binding, set_writes); } + + pipeline->BindResources(set_writes, buffer_barriers, push_data); + + return true; +} + +void Rasterizer::BindBuffers(const Shader::Info& stage, Shader::Backend::Bindings& binding, + Shader::PushData& push_data, Pipeline::DescriptorWrites& set_writes, + Pipeline::BufferBarriers& buffer_barriers) { + buffer_bindings.clear(); + + for (const auto& desc : stage.buffers) { + const auto vsharp = desc.GetSharp(stage); + if (!desc.is_gds_buffer && vsharp.base_address != 0 && vsharp.GetSize() > 0) { + const auto buffer_id = buffer_cache.FindBuffer(vsharp.base_address, vsharp.GetSize()); + buffer_bindings.emplace_back(buffer_id, vsharp); + } else { + buffer_bindings.emplace_back(VideoCore::BufferId{}, vsharp); + } + } + + texbuffer_bindings.clear(); + + for (const auto& desc : stage.texture_buffers) { + const auto vsharp = desc.GetSharp(stage); + if (vsharp.base_address != 0 && vsharp.GetSize() > 0 && + vsharp.GetDataFmt() != AmdGpu::DataFormat::FormatInvalid) { + const auto buffer_id = buffer_cache.FindBuffer(vsharp.base_address, vsharp.GetSize()); + texbuffer_bindings.emplace_back(buffer_id, vsharp); + } else { + texbuffer_bindings.emplace_back(VideoCore::BufferId{}, vsharp); + } + } + + // Bind the flattened user data buffer as a UBO so it's accessible to the shader + if (stage.has_readconst) { + const auto [vk_buffer, offset] = buffer_cache.ObtainHostUBO(stage.flattened_ud_buf); + buffer_infos.emplace_back(vk_buffer->Handle(), offset, + stage.flattened_ud_buf.size() * sizeof(u32)); + set_writes.push_back({ + .dstSet = VK_NULL_HANDLE, + .dstBinding = binding.unified++, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = vk::DescriptorType::eUniformBuffer, + .pBufferInfo = &buffer_infos.back(), + }); + ++binding.buffer; + } + + // Second pass to re-bind buffers that were updated after binding + for (u32 i = 0; i < buffer_bindings.size(); i++) { + const auto& [buffer_id, vsharp] = buffer_bindings[i]; + const auto& desc = stage.buffers[i]; + const bool is_storage = desc.IsStorage(vsharp); + if (!buffer_id) { + if (desc.is_gds_buffer) { + const auto* gds_buf = buffer_cache.GetGdsBuffer(); + buffer_infos.emplace_back(gds_buf->Handle(), 0, gds_buf->SizeBytes()); + } else if (instance.IsNullDescriptorSupported()) { + buffer_infos.emplace_back(VK_NULL_HANDLE, 0, VK_WHOLE_SIZE); + } else { + auto& null_buffer = buffer_cache.GetBuffer(VideoCore::NULL_BUFFER_ID); + buffer_infos.emplace_back(null_buffer.Handle(), 0, VK_WHOLE_SIZE); + } + } else { + const auto [vk_buffer, offset] = buffer_cache.ObtainBuffer( + vsharp.base_address, vsharp.GetSize(), desc.is_written, false, buffer_id); + const u32 alignment = + is_storage ? instance.StorageMinAlignment() : instance.UniformMinAlignment(); + const u32 offset_aligned = Common::AlignDown(offset, alignment); + const u32 adjust = offset - offset_aligned; + ASSERT(adjust % 4 == 0); + push_data.AddOffset(binding.buffer, adjust); + buffer_infos.emplace_back(vk_buffer->Handle(), offset_aligned, + vsharp.GetSize() + adjust); + } + + set_writes.push_back({ + .dstSet = VK_NULL_HANDLE, + .dstBinding = binding.unified++, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = is_storage ? vk::DescriptorType::eStorageBuffer + : vk::DescriptorType::eUniformBuffer, + .pBufferInfo = &buffer_infos.back(), + }); + ++binding.buffer; + } + + const auto null_buffer_view = + instance.IsNullDescriptorSupported() ? VK_NULL_HANDLE : buffer_cache.NullBufferView(); + for (u32 i = 0; i < texbuffer_bindings.size(); i++) { + const auto& [buffer_id, vsharp] = texbuffer_bindings[i]; + const auto& desc = stage.texture_buffers[i]; + vk::BufferView& buffer_view = buffer_views.emplace_back(null_buffer_view); + if (buffer_id) { + const u32 alignment = instance.TexelBufferMinAlignment(); + const auto [vk_buffer, offset] = buffer_cache.ObtainBuffer( + vsharp.base_address, vsharp.GetSize(), desc.is_written, true, buffer_id); + const u32 fmt_stride = AmdGpu::NumBits(vsharp.GetDataFmt()) >> 3; + ASSERT_MSG(fmt_stride == vsharp.GetStride(), + "Texel buffer stride must match format stride"); + const u32 offset_aligned = Common::AlignDown(offset, alignment); + const u32 adjust = offset - offset_aligned; + ASSERT(adjust % fmt_stride == 0); + push_data.AddOffset(binding.buffer, adjust / fmt_stride); + buffer_view = + vk_buffer->View(offset_aligned, vsharp.GetSize() + adjust, desc.is_written, + vsharp.GetDataFmt(), vsharp.GetNumberFmt()); + if (auto barrier = + vk_buffer->GetBarrier(desc.is_written ? vk::AccessFlagBits2::eShaderWrite + : vk::AccessFlagBits2::eShaderRead, + vk::PipelineStageFlagBits2::eComputeShader)) { + buffer_barriers.emplace_back(*barrier); + } + if (desc.is_written) { + texture_cache.InvalidateMemoryFromGPU(vsharp.base_address, vsharp.GetSize()); + } + } + + set_writes.push_back({ + .dstSet = VK_NULL_HANDLE, + .dstBinding = binding.unified++, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = desc.is_written ? vk::DescriptorType::eStorageTexelBuffer + : vk::DescriptorType::eUniformTexelBuffer, + .pTexelBufferView = &buffer_view, + }); + ++binding.buffer; + } +} + +void Rasterizer::BindTextures(const Shader::Info& stage, Shader::Backend::Bindings& binding, + Pipeline::DescriptorWrites& set_writes) { + image_bindings.clear(); + + for (const auto& image_desc : stage.images) { + const auto tsharp = image_desc.GetSharp(stage); + if (texture_cache.IsMeta(tsharp.Address())) { + LOG_WARNING(Render_Vulkan, "Unexpected metadata read by a shader (texture)"); + } + + if (tsharp.GetDataFmt() == AmdGpu::DataFormat::FormatInvalid) { + image_bindings.emplace_back(std::piecewise_construct, std::tuple{}, std::tuple{}); + continue; + } + + auto& [image_id, desc] = image_bindings.emplace_back(std::piecewise_construct, std::tuple{}, + std::tuple{tsharp, image_desc}); + image_id = texture_cache.FindImage(desc); + auto& image = texture_cache.GetImage(image_id); + if (image.binding.is_bound) { + // The image is already bound. In case if it is about to be used as storage we need + // to force general layout on it. + image.binding.force_general |= image_desc.is_storage; + } + if (image.binding.is_target) { + // The image is already bound as target. Since we read and output to it need to force + // general layout too. + image.binding.force_general = 1u; + } + image.binding.is_bound = 1u; + } + + // Second pass to re-bind images that were updated after binding + for (auto& [image_id, desc] : image_bindings) { + bool is_storage = desc.type == VideoCore::TextureCache::BindingType::Storage; + if (!image_id) { + if (instance.IsNullDescriptorSupported()) { + image_infos.emplace_back(VK_NULL_HANDLE, VK_NULL_HANDLE, vk::ImageLayout::eGeneral); + } else { + auto& null_image = texture_cache.GetImageView(VideoCore::NULL_IMAGE_VIEW_ID); + image_infos.emplace_back(VK_NULL_HANDLE, *null_image.image_view, + vk::ImageLayout::eGeneral); + } + } else { + if (auto& old_image = texture_cache.GetImage(image_id); + old_image.binding.needs_rebind) { + old_image.binding.Reset(); // clean up previous image binding state + image_id = texture_cache.FindImage(desc); + } + + bound_images.emplace_back(image_id); + + auto& image = texture_cache.GetImage(image_id); + auto& image_view = texture_cache.FindTexture(image_id, desc.view_info); + + if (image.binding.force_general || image.binding.is_target) { + image.Transit(vk::ImageLayout::eGeneral, + vk::AccessFlagBits2::eShaderRead | + (image.info.IsDepthStencil() + ? vk::AccessFlagBits2::eDepthStencilAttachmentWrite + : vk::AccessFlagBits2::eColorAttachmentWrite), + {}); + } else { + if (is_storage) { + image.Transit(vk::ImageLayout::eGeneral, + vk::AccessFlagBits2::eShaderRead | + vk::AccessFlagBits2::eShaderWrite, + desc.view_info.range); + } else { + const auto new_layout = image.info.IsDepthStencil() + ? vk::ImageLayout::eDepthStencilReadOnlyOptimal + : vk::ImageLayout::eShaderReadOnlyOptimal; + image.Transit(new_layout, vk::AccessFlagBits2::eShaderRead, + desc.view_info.range); + } + } + image.usage.storage |= is_storage; + image.usage.texture |= !is_storage; + + image_infos.emplace_back(VK_NULL_HANDLE, *image_view.image_view, + image.last_state.layout); + } + + set_writes.push_back({ + .dstSet = VK_NULL_HANDLE, + .dstBinding = binding.unified++, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = + is_storage ? vk::DescriptorType::eStorageImage : vk::DescriptorType::eSampledImage, + .pImageInfo = &image_infos.back(), + }); + } + + for (const auto& sampler : stage.samplers) { + auto ssharp = sampler.GetSharp(stage); + if (sampler.disable_aniso) { + const auto& tsharp = stage.images[sampler.associated_image].GetSharp(stage); + if (tsharp.base_level == 0 && tsharp.last_level == 0) { + ssharp.max_aniso.Assign(AmdGpu::AnisoRatio::One); + } + } + const auto vk_sampler = texture_cache.GetSampler(ssharp); + image_infos.emplace_back(vk_sampler, VK_NULL_HANDLE, vk::ImageLayout::eGeneral); + set_writes.push_back({ + .dstSet = VK_NULL_HANDLE, + .dstBinding = binding.unified++, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = vk::DescriptorType::eSampler, + .pImageInfo = &image_infos.back(), + }); + } +} + +void Rasterizer::BeginRendering(const GraphicsPipeline& pipeline, RenderState& state) { + int cb_index = 0; + for (auto& [image_id, desc] : cb_descs) { + if (auto& old_img = texture_cache.GetImage(image_id); old_img.binding.needs_rebind) { + auto& view = texture_cache.FindRenderTarget(desc); + ASSERT(view.image_id != image_id); + image_id = bound_images.emplace_back(view.image_id); + auto& image = texture_cache.GetImage(view.image_id); + state.color_attachments[cb_index].imageView = *view.image_view; + state.color_attachments[cb_index].imageLayout = image.last_state.layout; + state.color_images[cb_index] = image.image; + + const auto mip = view.info.range.base.level; + state.width = std::min(state.width, std::max(image.info.size.width >> mip, 1u)); + state.height = std::min(state.height, std::max(image.info.size.height >> mip, 1u)); + ASSERT(old_img.info.size.width == state.width); + ASSERT(old_img.info.size.height == state.height); + } + auto& image = texture_cache.GetImage(image_id); + if (image.binding.force_general) { + image.Transit( + vk::ImageLayout::eGeneral, + vk::AccessFlagBits2::eColorAttachmentWrite | vk::AccessFlagBits2::eShaderRead, {}); + + } else { + image.Transit(vk::ImageLayout::eColorAttachmentOptimal, + vk::AccessFlagBits2::eColorAttachmentWrite | + vk::AccessFlagBits2::eColorAttachmentRead, + desc.view_info.range); + } + image.usage.render_target = 1u; + state.color_attachments[cb_index].imageLayout = image.last_state.layout; + ++cb_index; + } + + if (db_desc) { + const auto& image_id = std::get<0>(*db_desc); + const auto& desc = std::get<1>(*db_desc); + auto& image = texture_cache.GetImage(image_id); + ASSERT(image.binding.needs_rebind == 0); + const bool has_stencil = image.usage.stencil; + if (has_stencil) { + image.aspect_mask |= vk::ImageAspectFlagBits::eStencil; + } + if (image.binding.force_general) { + image.Transit(vk::ImageLayout::eGeneral, + vk::AccessFlagBits2::eDepthStencilAttachmentWrite | + vk::AccessFlagBits2::eShaderRead, + {}); + } else { + const auto new_layout = desc.view_info.is_storage + ? has_stencil + ? vk::ImageLayout::eDepthStencilAttachmentOptimal + : vk::ImageLayout::eDepthAttachmentOptimal + : has_stencil ? vk::ImageLayout::eDepthStencilReadOnlyOptimal + : vk::ImageLayout::eDepthReadOnlyOptimal; + image.Transit(new_layout, + vk::AccessFlagBits2::eDepthStencilAttachmentWrite | + vk::AccessFlagBits2::eDepthStencilAttachmentRead, + desc.view_info.range); + } + state.depth_attachment.imageLayout = image.last_state.layout; + image.usage.depth_target = true; + image.usage.stencil = has_stencil; + } + scheduler.BeginRendering(state); } @@ -328,10 +729,12 @@ void Rasterizer::Resolve() { // Read from MRT0, average all samples, and write to MRT1, which is one-sample const auto& mrt0_hint = liverpool->last_cb_extent[0]; const auto& mrt1_hint = liverpool->last_cb_extent[1]; - VideoCore::ImageInfo mrt0_info{liverpool->regs.color_buffers[0], mrt0_hint}; - VideoCore::ImageInfo mrt1_info{liverpool->regs.color_buffers[1], mrt1_hint}; - auto& mrt0_image = texture_cache.GetImage(texture_cache.FindImage(mrt0_info)); - auto& mrt1_image = texture_cache.GetImage(texture_cache.FindImage(mrt1_info)); + VideoCore::TextureCache::RenderTargetDesc mrt0_desc{liverpool->regs.color_buffers[0], + mrt0_hint}; + VideoCore::TextureCache::RenderTargetDesc mrt1_desc{liverpool->regs.color_buffers[1], + mrt1_hint}; + auto& mrt0_image = texture_cache.GetImage(texture_cache.FindImage(mrt0_desc)); + auto& mrt1_image = texture_cache.GetImage(texture_cache.FindImage(mrt1_desc)); VideoCore::SubresourceRange mrt0_range; mrt0_range.base.layer = liverpool->regs.color_buffers[0].view.slice_start; diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.h b/src/video_core/renderer_vulkan/vk_rasterizer.h index b6813aec9..5102cda38 100644 --- a/src/video_core/renderer_vulkan/vk_rasterizer.h +++ b/src/video_core/renderer_vulkan/vk_rasterizer.h @@ -19,6 +19,7 @@ class MemoryManager; namespace Vulkan { class Scheduler; +class RenderState; class GraphicsPipeline; class Rasterizer { @@ -54,7 +55,8 @@ public: void Finish(); private: - void BeginRendering(const GraphicsPipeline& pipeline); + RenderState PrepareRenderState(u32 mrt_mask); + void BeginRendering(const GraphicsPipeline& pipeline, RenderState& state); void Resolve(); void UpdateDynamicState(const GraphicsPipeline& pipeline); @@ -63,6 +65,21 @@ private: bool FilterDraw(); + void BindBuffers(const Shader::Info& stage, Shader::Backend::Bindings& binding, + Shader::PushData& push_data, Pipeline::DescriptorWrites& set_writes, + Pipeline::BufferBarriers& buffer_barriers); + + void BindTextures(const Shader::Info& stage, Shader::Backend::Bindings& binding, + Pipeline::DescriptorWrites& set_writes); + + bool BindResources(const Pipeline* pipeline); + void ResetBindings() { + for (auto& image_id : bound_images) { + texture_cache.GetImage(image_id).binding.Reset(); + } + bound_images.clear(); + } + private: const Instance& instance; Scheduler& scheduler; @@ -72,6 +89,25 @@ private: AmdGpu::Liverpool* liverpool; Core::MemoryManager* memory; PipelineCache pipeline_cache; + + boost::container::static_vector< + std::pair, 8> + cb_descs; + std::optional> db_desc; + boost::container::static_vector image_infos; + boost::container::static_vector buffer_views; + boost::container::static_vector buffer_infos; + boost::container::static_vector bound_images; + + Pipeline::DescriptorWrites set_writes; + Pipeline::BufferBarriers buffer_barriers; + + using BufferBindingInfo = std::pair; + boost::container::static_vector buffer_bindings; + using TexBufferBindingInfo = std::pair; + boost::container::static_vector texbuffer_bindings; + using ImageBindingInfo = std::pair; + boost::container::static_vector image_bindings; }; } // namespace Vulkan diff --git a/src/video_core/texture_cache/image.cpp b/src/video_core/texture_cache/image.cpp index bea2ce4ff..dc43036c6 100644 --- a/src/video_core/texture_cache/image.cpp +++ b/src/video_core/texture_cache/image.cpp @@ -61,6 +61,15 @@ bool ImageInfo::IsDepthStencil() const { } } +bool ImageInfo::HasStencil() const { + if (pixel_format == vk::Format::eD32SfloatS8Uint || + pixel_format == vk::Format::eD24UnormS8Uint || + pixel_format == vk::Format::eD16UnormS8Uint) { + return true; + } + return false; +} + static vk::ImageUsageFlags ImageUsageFlags(const ImageInfo& info) { vk::ImageUsageFlags usage = vk::ImageUsageFlagBits::eTransferSrc | vk::ImageUsageFlagBits::eTransferDst | @@ -143,14 +152,17 @@ Image::Image(const Vulkan::Instance& instance_, Vulkan::Scheduler& scheduler_, // the texture cache should re-create the resource with the usage requested vk::ImageCreateFlags flags{vk::ImageCreateFlagBits::eMutableFormat | vk::ImageCreateFlagBits::eExtendedUsage}; - if (info.props.is_cube || (info.type == vk::ImageType::e2D && info.resources.layers >= 6)) { + const bool can_be_cube = (info.type == vk::ImageType::e2D) && + (info.resources.layers % 6 == 0) && + (info.size.width == info.size.height); + if (info.props.is_cube || can_be_cube) { flags |= vk::ImageCreateFlagBits::eCubeCompatible; } else if (info.props.is_volume) { flags |= vk::ImageCreateFlagBits::e2DArrayCompatible; } - usage = ImageUsageFlags(info); - format_features = FormatFeatureFlags(usage); + usage_flags = ImageUsageFlags(info); + format_features = FormatFeatureFlags(usage_flags); switch (info.pixel_format) { case vk::Format::eD16Unorm: @@ -170,7 +182,7 @@ Image::Image(const Vulkan::Instance& instance_, Vulkan::Scheduler& scheduler_, constexpr auto tiling = vk::ImageTiling::eOptimal; const auto supported_format = instance->GetSupportedFormat(info.pixel_format, format_features); const auto properties = instance->GetPhysicalDevice().getImageFormatProperties( - supported_format, info.type, tiling, usage, flags); + supported_format, info.type, tiling, usage_flags, flags); const auto supported_samples = properties.result == vk::Result::eSuccess ? properties.value.sampleCounts : vk::SampleCountFlagBits::e1; @@ -188,7 +200,7 @@ Image::Image(const Vulkan::Instance& instance_, Vulkan::Scheduler& scheduler_, .arrayLayers = static_cast(info.resources.layers), .samples = LiverpoolToVK::NumSamples(info.num_samples, supported_samples), .tiling = tiling, - .usage = usage, + .usage = usage_flags, .initialLayout = vk::ImageLayout::eUndefined, }; diff --git a/src/video_core/texture_cache/image.h b/src/video_core/texture_cache/image.h index 312ff97e8..8d84277d8 100644 --- a/src/video_core/texture_cache/image.h +++ b/src/video_core/texture_cache/image.h @@ -30,8 +30,6 @@ enum ImageFlagBits : u32 { Registered = 1 << 6, ///< True when the image is registered Picked = 1 << 7, ///< Temporary flag to mark the image as picked MetaRegistered = 1 << 8, ///< True when metadata for this surface is known and registered - Bound = 1 << 9, ///< True when the image is bound to a descriptor set - NeedsRebind = 1 << 10, ///< True when the image needs to be rebound }; DECLARE_ENUM_FLAG_OPERATORS(ImageFlagBits) @@ -113,7 +111,15 @@ struct Image { std::vector image_view_ids; // Resource state tracking - vk::ImageUsageFlags usage; + struct { + u32 texture : 1; + u32 storage : 1; + u32 render_target : 1; + u32 depth_target : 1; + u32 stencil : 1; + u32 vo_surface : 1; + } usage{}; + vk::ImageUsageFlags usage_flags; vk::FormatFeatureFlags2 format_features; struct State { vk::Flags pl_stage = vk::PipelineStageFlagBits2::eAllCommands; @@ -124,6 +130,22 @@ struct Image { std::vector subresource_states{}; boost::container::small_vector mip_hashes{}; u64 tick_accessed_last{0}; + + struct { + union { + struct { + u32 is_bound : 1; // the image is bound to a descriptor set + u32 is_target : 1; // the image is bound as color/depth target + u32 needs_rebind : 1; // the image needs to be rebound + u32 force_general : 1; // the image needs to be used in general layout + }; + u32 raw{}; + }; + + void Reset() { + raw = 0u; + } + } binding{}; }; } // namespace VideoCore diff --git a/src/video_core/texture_cache/image_info.cpp b/src/video_core/texture_cache/image_info.cpp index 2956a2a3e..0ed36ee39 100644 --- a/src/video_core/texture_cache/image_info.cpp +++ b/src/video_core/texture_cache/image_info.cpp @@ -245,7 +245,6 @@ ImageInfo::ImageInfo(const Libraries::VideoOut::BufferAttributeGroup& group, size.width = attrib.width; size.height = attrib.height; pitch = attrib.tiling_mode == TilingMode::Linear ? size.width : (size.width + 127) & (~127); - usage.vo_buffer = true; num_bits = attrib.pixel_format != VideoOutFormat::A16R16G16B16Float ? 32 : 64; ASSERT(num_bits == 32); @@ -277,7 +276,6 @@ ImageInfo::ImageInfo(const AmdGpu::Liverpool::ColorBuffer& buffer, resources.layers = buffer.NumSlices(); meta_info.cmask_addr = buffer.info.fast_clear ? buffer.CmaskAddress() : 0; meta_info.fmask_addr = buffer.info.compression ? buffer.FmaskAddress() : 0; - usage.render_target = true; guest_address = buffer.Address(); const auto color_slice_sz = buffer.GetColorSliceSize(); @@ -299,9 +297,6 @@ ImageInfo::ImageInfo(const AmdGpu::Liverpool::DepthBuffer& buffer, u32 num_slice pitch = buffer.Pitch(); resources.layers = num_slices; meta_info.htile_addr = buffer.z_info.tile_surface_en ? htile_address : 0; - usage.depth_target = true; - usage.stencil = - buffer.stencil_info.format != AmdGpu::Liverpool::DepthBuffer::StencilFormat::Invalid; guest_address = buffer.Address(); const auto depth_slice_sz = buffer.GetDepthSliceSize(); @@ -330,7 +325,6 @@ ImageInfo::ImageInfo(const AmdGpu::Image& image, const Shader::ImageResource& de resources.layers = image.NumLayers(desc.is_array); num_samples = image.NumSamples(); num_bits = NumBits(image.GetDataFmt()); - usage.texture = true; guest_address = image.Address(); @@ -392,7 +386,6 @@ void ImageInfo::UpdateSize() { } } mip_info.size *= mip_d; - mip_info.offset = guest_size_bytes; mips_layout.emplace_back(mip_info); guest_size_bytes += mip_info.size; @@ -400,79 +393,87 @@ void ImageInfo::UpdateSize() { guest_size_bytes *= resources.layers; } -bool ImageInfo::IsMipOf(const ImageInfo& info) const { +int ImageInfo::IsMipOf(const ImageInfo& info) const { if (!IsCompatible(info)) { - return false; + return -1; + } + + if (IsTilingCompatible(info.tiling_idx, tiling_idx)) { + return -1; } // Currently we expect only on level to be copied. if (resources.levels != 1) { - return false; + return -1; } - const int mip = info.resources.levels - resources.levels; - if (mip < 1) { - return false; + if (info.mips_layout.empty()) { + UNREACHABLE(); } + // Find mip + auto mip = -1; + for (auto m = 0; m < info.mips_layout.size(); ++m) { + if (guest_address == (info.guest_address + info.mips_layout[m].offset)) { + mip = m; + break; + } + } + + if (mip < 0) { + return -1; + } + ASSERT(mip != 0); + const auto mip_w = std::max(info.size.width >> mip, 1u); const auto mip_h = std::max(info.size.height >> mip, 1u); if ((size.width != mip_w) || (size.height != mip_h)) { - return false; + return -1; } const auto mip_d = std::max(info.size.depth >> mip, 1u); if (info.type == vk::ImageType::e3D && type == vk::ImageType::e2D) { // In case of 2D array to 3D copy, make sure we have proper number of layers. if (resources.layers != mip_d) { - return false; + return -1; } } else { if (type != info.type) { - return false; + return -1; } } - // Check if the mip has correct size. - if (info.mips_layout.size() <= mip || info.mips_layout[mip].size != guest_size_bytes) { - return false; - } - - // Ensure that address matches too. - if ((info.guest_address + info.mips_layout[mip].offset) != guest_address) { - return false; - } - - return true; + return mip; } -bool ImageInfo::IsSliceOf(const ImageInfo& info) const { +int ImageInfo::IsSliceOf(const ImageInfo& info) const { if (!IsCompatible(info)) { - return false; + return -1; } // Array slices should be of the same type. if (type != info.type) { - return false; + return -1; } // 2D dimensions of both images should be the same. if ((size.width != info.size.width) || (size.height != info.size.height)) { - return false; + return -1; } // Check for size alignment. const bool slice_size = info.guest_size_bytes / info.resources.layers; if (guest_size_bytes % slice_size != 0) { - return false; + return -1; } // Ensure that address is aligned too. - if (((info.guest_address - guest_address) % guest_size_bytes) != 0) { - return false; + const auto addr_diff = guest_address - info.guest_address; + if ((addr_diff % guest_size_bytes) != 0) { + return -1; } - return true; + return addr_diff / guest_size_bytes; } } // namespace VideoCore diff --git a/src/video_core/texture_cache/image_info.h b/src/video_core/texture_cache/image_info.h index 2ae2547f7..e12ae3be1 100644 --- a/src/video_core/texture_cache/image_info.h +++ b/src/video_core/texture_cache/image_info.h @@ -28,14 +28,28 @@ struct ImageInfo { bool IsBlockCoded() const; bool IsPacked() const; bool IsDepthStencil() const; + bool HasStencil() const; - bool IsMipOf(const ImageInfo& info) const; - bool IsSliceOf(const ImageInfo& info) const; + int IsMipOf(const ImageInfo& info) const; + int IsSliceOf(const ImageInfo& info) const; /// Verifies if images are compatible for subresource merging. bool IsCompatible(const ImageInfo& info) const { - return (pixel_format == info.pixel_format && tiling_idx == info.tiling_idx && - num_samples == info.num_samples && num_bits == info.num_bits); + return (pixel_format == info.pixel_format && num_samples == info.num_samples && + num_bits == info.num_bits); + } + + bool IsTilingCompatible(u32 lhs, u32 rhs) const { + if (lhs == rhs) { + return true; + } + if (lhs == 0x0e && rhs == 0x0d) { + return true; + } + if (lhs == 0x0d && rhs == 0x0e) { + return true; + } + return false; } void UpdateSize(); @@ -46,15 +60,6 @@ struct ImageInfo { VAddr htile_addr; } meta_info{}; - struct { - u32 texture : 1; - u32 storage : 1; - u32 render_target : 1; - u32 depth_target : 1; - u32 stencil : 1; - u32 vo_buffer : 1; - } usage{}; // Usage data tracked during image lifetime - struct { u32 is_cube : 1; u32 is_volume : 1; @@ -81,6 +86,9 @@ struct ImageInfo { VAddr guest_address{0}; u32 guest_size_bytes{0}; u32 tiling_idx{0}; // TODO: merge with existing! + + VAddr stencil_addr{0}; + u32 stencil_size{0}; }; } // namespace VideoCore diff --git a/src/video_core/texture_cache/image_view.cpp b/src/video_core/texture_cache/image_view.cpp index 8bde37941..488d44a7f 100644 --- a/src/video_core/texture_cache/image_view.cpp +++ b/src/video_core/texture_cache/image_view.cpp @@ -149,7 +149,7 @@ ImageViewInfo::ImageViewInfo(const AmdGpu::Liverpool::DepthBuffer& depth_buffer, ImageView::ImageView(const Vulkan::Instance& instance, const ImageViewInfo& info_, Image& image, ImageId image_id_) : image_id{image_id_}, info{info_} { - vk::ImageViewUsageCreateInfo usage_ci{.usage = image.usage}; + vk::ImageViewUsageCreateInfo usage_ci{.usage = image.usage_flags}; if (!info.is_storage) { usage_ci.usage &= ~vk::ImageUsageFlagBits::eStorage; } diff --git a/src/video_core/texture_cache/texture_cache.cpp b/src/video_core/texture_cache/texture_cache.cpp index 0e8dd7ccc..516c110a4 100644 --- a/src/video_core/texture_cache/texture_cache.cpp +++ b/src/video_core/texture_cache/texture_cache.cpp @@ -77,84 +77,149 @@ void TextureCache::UnmapMemory(VAddr cpu_addr, size_t size) { } } -ImageId TextureCache::ResolveDepthOverlap(const ImageInfo& requested_info, ImageId cache_image_id) { - const auto& cache_info = slot_images[cache_image_id].info; +ImageId TextureCache::ResolveDepthOverlap(const ImageInfo& requested_info, BindingType binding, + ImageId cache_image_id) { + const auto& cache_image = slot_images[cache_image_id]; - const bool was_bound_as_texture = - !cache_info.usage.depth_target && (cache_info.usage.texture || cache_info.usage.storage); - if (requested_info.usage.depth_target && was_bound_as_texture) { - auto new_image_id = slot_images.insert(instance, scheduler, requested_info); + if (!cache_image.info.IsDepthStencil() && !requested_info.IsDepthStencil()) { + return {}; + } + + const bool stencil_match = requested_info.HasStencil() == cache_image.info.HasStencil(); + const bool bpp_match = requested_info.num_bits == cache_image.info.num_bits; + + // If an image in the cache has less slices we need to expand it + bool recreate = cache_image.info.resources < requested_info.resources; + + switch (binding) { + case BindingType::Texture: + // The guest requires a depth sampled texture, but cache can offer only Rxf. Need to + // recreate the image. + recreate |= requested_info.IsDepthStencil() && !cache_image.info.IsDepthStencil(); + break; + case BindingType::Storage: + // If the guest is going to use previously created depth as storage, the image needs to be + // recreated. (TODO: Probably a case with linear rgba8 aliasing is legit) + recreate |= cache_image.info.IsDepthStencil(); + break; + case BindingType::RenderTarget: + // Render target can have only Rxf format. If the cache contains only Dx[S8] we need to + // re-create the image. + ASSERT(!requested_info.IsDepthStencil()); + recreate |= cache_image.info.IsDepthStencil(); + break; + case BindingType::DepthTarget: + // The guest has requested previously allocated texture to be bound as a depth target. + // In this case we need to convert Rx float to a Dx[S8] as requested + recreate |= !cache_image.info.IsDepthStencil(); + + // The guest is trying to bind a depth target and cache has it. Need to be sure that aspects + // and bpp match + recreate |= cache_image.info.IsDepthStencil() && !(stencil_match && bpp_match); + break; + default: + break; + } + + if (recreate) { + auto new_info{requested_info}; + new_info.resources = std::max(requested_info.resources, cache_image.info.resources); + new_info.UpdateSize(); + const auto new_image_id = slot_images.insert(instance, scheduler, new_info); RegisterImage(new_image_id); + // Inherit image usage + auto& new_image = GetImage(new_image_id); + new_image.usage = cache_image.usage; + // TODO: perform a depth copy here FreeImage(cache_image_id); return new_image_id; } - const bool should_bind_as_texture = - !requested_info.usage.depth_target && - (requested_info.usage.texture || requested_info.usage.storage); - if (cache_info.usage.depth_target && should_bind_as_texture) { - if (cache_info.resources == requested_info.resources) { - return cache_image_id; - } else { - // UNREACHABLE(); - } - } - - return {}; + // Will be handled by view + return cache_image_id; } -ImageId TextureCache::ResolveOverlap(const ImageInfo& image_info, ImageId cache_image_id, - ImageId merged_image_id) { +std::tuple TextureCache::ResolveOverlap(const ImageInfo& image_info, + BindingType binding, + ImageId cache_image_id, + ImageId merged_image_id) { auto& tex_cache_image = slot_images[cache_image_id]; + // We can assume it is safe to delete the image if it wasn't accessed in some number of frames. + const bool safe_to_delete = + scheduler.CurrentTick() - tex_cache_image.tick_accessed_last > NumFramesBeforeRemoval; if (image_info.guest_address == tex_cache_image.info.guest_address) { // Equal address if (image_info.size != tex_cache_image.info.size) { - // Very likely this kind of overlap is caused by allocation from a pool. We can assume - // it is safe to delete the image if it wasn't accessed in some amount of frames. - if (scheduler.CurrentTick() - tex_cache_image.tick_accessed_last > - NumFramesBeforeRemoval) { - + // Very likely this kind of overlap is caused by allocation from a pool. + if (safe_to_delete) { FreeImage(cache_image_id); } - return merged_image_id; + return {merged_image_id, -1, -1}; } - if (auto depth_image_id = ResolveDepthOverlap(image_info, cache_image_id)) { - return depth_image_id; + if (const auto depth_image_id = ResolveDepthOverlap(image_info, binding, cache_image_id)) { + return {depth_image_id, -1, -1}; } if (image_info.pixel_format != tex_cache_image.info.pixel_format || image_info.guest_size_bytes <= tex_cache_image.info.guest_size_bytes) { auto result_id = merged_image_id ? merged_image_id : cache_image_id; const auto& result_image = slot_images[result_id]; - return IsVulkanFormatCompatible(image_info.pixel_format, result_image.info.pixel_format) - ? result_id - : ImageId{}; + return { + IsVulkanFormatCompatible(image_info.pixel_format, result_image.info.pixel_format) + ? result_id + : ImageId{}, + -1, -1}; } ImageId new_image_id{}; if (image_info.type == tex_cache_image.info.type) { + ASSERT(image_info.resources > tex_cache_image.info.resources); new_image_id = ExpandImage(image_info, cache_image_id); } else { UNREACHABLE(); } - return new_image_id; + return {new_image_id, -1, -1}; } // Right overlap, the image requested is a possible subresource of the image from cache. if (image_info.guest_address > tex_cache_image.info.guest_address) { - // Should be handled by view. No additional actions needed. + if (auto mip = image_info.IsMipOf(tex_cache_image.info); mip >= 0) { + return {cache_image_id, mip, -1}; + } + + if (auto slice = image_info.IsSliceOf(tex_cache_image.info); slice >= 0) { + return {cache_image_id, -1, slice}; + } + + // TODO: slice and mip + + if (safe_to_delete) { + FreeImage(cache_image_id); + } + + return {{}, -1, -1}; } else { // Left overlap, the image from cache is a possible subresource of the image requested if (!merged_image_id) { // We need to have a larger, already allocated image to copy this one into - return {}; + return {{}, -1, -1}; } - if (tex_cache_image.info.IsMipOf(image_info)) { + if (auto mip = tex_cache_image.info.IsMipOf(image_info); mip >= 0) { + if (tex_cache_image.binding.is_target) { + // We have a larger image created and a separate one, representing a subres of it, + // bound as render target. In this case we need to rebind render target. + tex_cache_image.binding.needs_rebind = 1u; + GetImage(merged_image_id).binding.is_target = 1u; + + FreeImage(cache_image_id); + return {merged_image_id, -1, -1}; + } + tex_cache_image.Transit(vk::ImageLayout::eTransferSrcOptimal, vk::AccessFlagBits2::eTransferRead, {}); @@ -162,13 +227,13 @@ ImageId TextureCache::ResolveOverlap(const ImageInfo& image_info, ImageId cache_ ASSERT(num_mips_to_copy == 1); auto& merged_image = slot_images[merged_image_id]; - merged_image.CopyMip(tex_cache_image, image_info.resources.levels - 1); + merged_image.CopyMip(tex_cache_image, mip); FreeImage(cache_image_id); } } - return merged_image_id; + return {merged_image_id, -1, -1}; } ImageId TextureCache::ExpandImage(const ImageInfo& info, ImageId image_id) { @@ -181,8 +246,8 @@ ImageId TextureCache::ExpandImage(const ImageInfo& info, ImageId image_id) { src_image.Transit(vk::ImageLayout::eTransferSrcOptimal, vk::AccessFlagBits2::eTransferRead, {}); new_image.CopyImage(src_image); - if (True(src_image.flags & ImageFlagBits::Bound)) { - src_image.flags |= ImageFlagBits::NeedsRebind; + if (src_image.binding.is_bound || src_image.binding.is_target) { + src_image.binding.needs_rebind = 1u; } FreeImage(image_id); @@ -192,9 +257,11 @@ ImageId TextureCache::ExpandImage(const ImageInfo& info, ImageId image_id) { return new_image_id; } -ImageId TextureCache::FindImage(const ImageInfo& info, FindFlags flags) { +ImageId TextureCache::FindImage(BaseDesc& desc, FindFlags flags) { + const auto& info = desc.info; + if (info.guest_address == 0) [[unlikely]] { - return NULL_IMAGE_VIEW_ID; + return NULL_IMAGE_ID; } std::scoped_lock lock{mutex}; @@ -231,10 +298,16 @@ ImageId TextureCache::FindImage(const ImageInfo& info, FindFlags flags) { } // Try to resolve overlaps (if any) + int view_mip{-1}; + int view_slice{-1}; if (!image_id) { for (const auto& cache_id : image_ids) { + view_mip = -1; + view_slice = -1; + const auto& merged_info = image_id ? slot_images[image_id].info : info; - image_id = ResolveOverlap(merged_info, cache_id, image_id); + std::tie(image_id, view_mip, view_slice) = + ResolveOverlap(merged_info, desc.type, cache_id, image_id); } } @@ -254,6 +327,10 @@ ImageId TextureCache::FindImage(const ImageInfo& info, FindFlags flags) { RegisterImage(image_id); } + if (view_mip > 0) { + desc.view_info.range.base.level = view_mip; + } + Image& image = slot_images[image_id]; image.tick_accessed_last = scheduler.CurrentTick(); @@ -275,100 +352,58 @@ ImageView& TextureCache::RegisterImageView(ImageId image_id, const ImageViewInfo ImageView& TextureCache::FindTexture(ImageId image_id, const ImageViewInfo& view_info) { Image& image = slot_images[image_id]; UpdateImage(image_id); - auto& usage = image.info.usage; - - if (view_info.is_storage) { - image.Transit(vk::ImageLayout::eGeneral, - vk::AccessFlagBits2::eShaderRead | vk::AccessFlagBits2::eShaderWrite, - view_info.range); - usage.storage = true; - } else { - const auto new_layout = image.info.IsDepthStencil() - ? vk::ImageLayout::eDepthStencilReadOnlyOptimal - : vk::ImageLayout::eShaderReadOnlyOptimal; - image.Transit(new_layout, vk::AccessFlagBits2::eShaderRead, view_info.range); - usage.texture = true; - } - return RegisterImageView(image_id, view_info); } -ImageView& TextureCache::FindRenderTarget(const ImageInfo& image_info, - const ImageViewInfo& view_info) { - const ImageId image_id = FindImage(image_info); +ImageView& TextureCache::FindRenderTarget(BaseDesc& desc) { + const ImageId image_id = FindImage(desc); Image& image = slot_images[image_id]; image.flags |= ImageFlagBits::GpuModified; + image.usage.render_target = 1u; UpdateImage(image_id); - image.Transit(vk::ImageLayout::eColorAttachmentOptimal, - vk::AccessFlagBits2::eColorAttachmentWrite | - vk::AccessFlagBits2::eColorAttachmentRead, - view_info.range); - // Register meta data for this color buffer if (!(image.flags & ImageFlagBits::MetaRegistered)) { - if (image_info.meta_info.cmask_addr) { + if (desc.info.meta_info.cmask_addr) { surface_metas.emplace( - image_info.meta_info.cmask_addr, + desc.info.meta_info.cmask_addr, MetaDataInfo{.type = MetaDataInfo::Type::CMask, .is_cleared = true}); - image.info.meta_info.cmask_addr = image_info.meta_info.cmask_addr; + image.info.meta_info.cmask_addr = desc.info.meta_info.cmask_addr; image.flags |= ImageFlagBits::MetaRegistered; } - if (image_info.meta_info.fmask_addr) { + if (desc.info.meta_info.fmask_addr) { surface_metas.emplace( - image_info.meta_info.fmask_addr, + desc.info.meta_info.fmask_addr, MetaDataInfo{.type = MetaDataInfo::Type::FMask, .is_cleared = true}); - image.info.meta_info.fmask_addr = image_info.meta_info.fmask_addr; + image.info.meta_info.fmask_addr = desc.info.meta_info.fmask_addr; image.flags |= ImageFlagBits::MetaRegistered; } } - // Update tracked image usage - image.info.usage.render_target = true; - - return RegisterImageView(image_id, view_info); + return RegisterImageView(image_id, desc.view_info); } -ImageView& TextureCache::FindDepthTarget(const ImageInfo& image_info, - const ImageViewInfo& view_info) { - const ImageId image_id = FindImage(image_info); +ImageView& TextureCache::FindDepthTarget(BaseDesc& desc) { + const ImageId image_id = FindImage(desc); Image& image = slot_images[image_id]; image.flags |= ImageFlagBits::GpuModified; image.flags &= ~ImageFlagBits::Dirty; - image.aspect_mask = vk::ImageAspectFlagBits::eDepth; - - const bool has_stencil = image_info.usage.stencil; - if (has_stencil) { - image.aspect_mask |= vk::ImageAspectFlagBits::eStencil; - } - - const auto new_layout = view_info.is_storage - ? has_stencil ? vk::ImageLayout::eDepthStencilAttachmentOptimal - : vk::ImageLayout::eDepthAttachmentOptimal - : has_stencil ? vk::ImageLayout::eDepthStencilReadOnlyOptimal - : vk::ImageLayout::eDepthReadOnlyOptimal; - image.Transit(new_layout, - vk::AccessFlagBits2::eDepthStencilAttachmentWrite | - vk::AccessFlagBits2::eDepthStencilAttachmentRead, - view_info.range); + image.usage.depth_target = 1u; + image.usage.stencil = image.info.HasStencil(); // Register meta data for this depth buffer if (!(image.flags & ImageFlagBits::MetaRegistered)) { - if (image_info.meta_info.htile_addr) { + if (desc.info.meta_info.htile_addr) { surface_metas.emplace( - image_info.meta_info.htile_addr, + desc.info.meta_info.htile_addr, MetaDataInfo{.type = MetaDataInfo::Type::HTile, .is_cleared = true}); - image.info.meta_info.htile_addr = image_info.meta_info.htile_addr; + image.info.meta_info.htile_addr = desc.info.meta_info.htile_addr; image.flags |= ImageFlagBits::MetaRegistered; } } - // Update tracked image usage - image.info.usage.depth_target = true; - image.info.usage.stencil = has_stencil; - - return RegisterImageView(image_id, view_info); + return RegisterImageView(image_id, desc.view_info); } void TextureCache::RefreshImage(Image& image, Vulkan::Scheduler* custom_scheduler /*= nullptr*/) { @@ -472,7 +507,7 @@ void TextureCache::RegisterImage(ImageId image_id) { void TextureCache::UnregisterImage(ImageId image_id) { Image& image = slot_images[image_id]; ASSERT_MSG(True(image.flags & ImageFlagBits::Registered), - "Trying to unregister an already registered image"); + "Trying to unregister an already unregistered image"); image.flags &= ~ImageFlagBits::Registered; ForEachPage(image.cpu_addr, image.info.guest_size_bytes, [this, image_id](u64 page) { const auto page_it = page_table.find(page); diff --git a/src/video_core/texture_cache/texture_cache.h b/src/video_core/texture_cache/texture_cache.h index 96970bfc8..8ac603f06 100644 --- a/src/video_core/texture_cache/texture_cache.h +++ b/src/video_core/texture_cache/texture_cache.h @@ -43,8 +43,55 @@ class TextureCache { using PageTable = MultiLevelPageTable; public: - explicit TextureCache(const Vulkan::Instance& instance, Vulkan::Scheduler& scheduler, - BufferCache& buffer_cache, PageManager& tracker); + enum class BindingType : u32 { + Texture, + Storage, + RenderTarget, + DepthTarget, + VideoOut, + }; + + struct BaseDesc { + ImageInfo info; + ImageViewInfo view_info; + BindingType type{BindingType::Texture}; + + BaseDesc() = default; + BaseDesc(BindingType type_, ImageInfo info_, ImageViewInfo view_info_) noexcept + : info{std::move(info_)}, view_info{std::move(view_info_)}, type{type_} {} + }; + + struct TextureDesc : public BaseDesc { + TextureDesc() = default; + TextureDesc(const AmdGpu::Image& image, const Shader::ImageResource& desc) + : BaseDesc{desc.is_storage ? BindingType::Storage : BindingType::Texture, + ImageInfo{image, desc}, ImageViewInfo{image, desc}} {} + }; + + struct RenderTargetDesc : public BaseDesc { + RenderTargetDesc(const AmdGpu::Liverpool::ColorBuffer& buffer, + const AmdGpu::Liverpool::CbDbExtent& hint = {}) + : BaseDesc{BindingType::RenderTarget, ImageInfo{buffer, hint}, ImageViewInfo{buffer}} {} + }; + + struct DepthTargetDesc : public BaseDesc { + DepthTargetDesc(const AmdGpu::Liverpool::DepthBuffer& buffer, + const AmdGpu::Liverpool::DepthView& view, + const AmdGpu::Liverpool::DepthControl& ctl, VAddr htile_address, + const AmdGpu::Liverpool::CbDbExtent& hint = {}) + : BaseDesc{BindingType::DepthTarget, + ImageInfo{buffer, view.NumSlices(), htile_address, hint}, + ImageViewInfo{buffer, view, ctl}} {} + }; + + struct VideoOutDesc : public BaseDesc { + VideoOutDesc(const Libraries::VideoOut::BufferAttributeGroup& group, VAddr cpu_address) + : BaseDesc{BindingType::VideoOut, ImageInfo{group, cpu_address}, ImageViewInfo{}} {} + }; + +public: + TextureCache(const Vulkan::Instance& instance, Vulkan::Scheduler& scheduler, + BufferCache& buffer_cache, PageManager& tracker); ~TextureCache(); /// Invalidates any image in the logical page range. @@ -57,18 +104,16 @@ public: void UnmapMemory(VAddr cpu_addr, size_t size); /// Retrieves the image handle of the image with the provided attributes. - [[nodiscard]] ImageId FindImage(const ImageInfo& info, FindFlags flags = {}); + [[nodiscard]] ImageId FindImage(BaseDesc& desc, FindFlags flags = {}); /// Retrieves an image view with the properties of the specified image id. [[nodiscard]] ImageView& FindTexture(ImageId image_id, const ImageViewInfo& view_info); /// Retrieves the render target with specified properties - [[nodiscard]] ImageView& FindRenderTarget(const ImageInfo& image_info, - const ImageViewInfo& view_info); + [[nodiscard]] ImageView& FindRenderTarget(BaseDesc& desc); /// Retrieves the depth target with specified properties - [[nodiscard]] ImageView& FindDepthTarget(const ImageInfo& image_info, - const ImageViewInfo& view_info); + [[nodiscard]] ImageView& FindDepthTarget(BaseDesc& desc); /// Updates image contents if it was modified by CPU. void UpdateImage(ImageId image_id, Vulkan::Scheduler* custom_scheduler = nullptr) { @@ -77,11 +122,13 @@ public: RefreshImage(image, custom_scheduler); } - [[nodiscard]] ImageId ResolveOverlap(const ImageInfo& info, ImageId cache_img_id, - ImageId merged_image_id); + [[nodiscard]] std::tuple ResolveOverlap(const ImageInfo& info, + BindingType binding, + ImageId cache_img_id, + ImageId merged_image_id); /// Resolves depth overlap and either re-creates the image or returns existing one - [[nodiscard]] ImageId ResolveDepthOverlap(const ImageInfo& requested_info, + [[nodiscard]] ImageId ResolveDepthOverlap(const ImageInfo& requested_info, BindingType binding, ImageId cache_img_id); [[nodiscard]] ImageId ExpandImage(const ImageInfo& info, ImageId image_id);