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spirv_image: Add dref instruction support
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f291674790
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c7bf29cbac
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@ -2,6 +2,7 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include <thread>
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#include <pthread.h>
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#include "common/native_clock.h"
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#include "core/libraries/kernel/time_management.h"
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#include "core/libraries/libs.h"
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@ -125,6 +126,10 @@ int PS4_SYSV_ABI gettimeofday(struct timeval* p, struct timezone* z) {
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return 0;
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}
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int PS4_SYSV_ABI posix_nanosleep(timespec* requested_time, timespec* remaining) {
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return nanosleep(requested_time, remaining);
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}
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void timeSymbolsRegister(Core::Loader::SymbolsResolver* sym) {
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clock = std::make_unique<Common::NativeClock>();
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initial_ptc = clock->GetUptime();
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@ -140,6 +145,7 @@ void timeSymbolsRegister(Core::Loader::SymbolsResolver* sym) {
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LIB_FUNCTION("QcteRwbsnV0", "libScePosix", 1, "libkernel", 1, 1, posix_usleep);
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LIB_FUNCTION("-ZR+hG7aDHw", "libkernel", 1, "libkernel", 1, 1, sceKernelSleep);
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LIB_FUNCTION("0wu33hunNdE", "libScePosix", 1, "libkernel", 1, 1, sceKernelSleep);
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LIB_FUNCTION("yS8U2TGCe1A", "libkernel", 1, "libkernel", 1, 1, posix_nanosleep);
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}
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} // namespace Libraries::Kernel
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@ -30,9 +30,13 @@ Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Va
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throw NotImplementedException("SPIR-V Instruction");
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}
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Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index,
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Id coords, Id dref, Id lod, const IR::Value& offset) {
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throw NotImplementedException("SPIR-V Instruction");
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Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id dref, Id bias_lc,
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Id offset) {
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const auto& texture = ctx.images[handle & 0xFFFF];
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const Id image = ctx.OpLoad(texture.image_type, texture.id);
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const Id sampler = ctx.OpLoad(ctx.sampler_type, ctx.samplers[handle >> 16]);
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const Id sampled_image = ctx.OpSampledImage(texture.sampled_type, image, sampler);
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return ctx.OpImageSampleDrefExplicitLod(ctx.F32[1], sampled_image, coords, dref, spv::ImageOperandsMask::Lod, ctx.ConstF32(0.f));
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}
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Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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@ -338,8 +338,8 @@ Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id c
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Id offset);
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Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index,
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Id coords, Id dref, Id bias_lc, const IR::Value& offset);
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Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index,
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Id coords, Id dref, Id lod, const IR::Value& offset);
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Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id dref, Id bias_lc,
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Id offset);
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Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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const IR::Value& offset, const IR::Value& offset2);
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Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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@ -301,7 +301,8 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
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case Opcode::V_MADAK_F32: // Yes these can share the opcode
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translator.V_FMA_F32(inst);
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break;
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case Opcode::IMAGE_SAMPLE_LZ: // TODO?
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case Opcode::IMAGE_SAMPLE_C_LZ:
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case Opcode::IMAGE_SAMPLE_LZ:
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case Opcode::IMAGE_SAMPLE:
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translator.IMAGE_SAMPLE(inst);
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break;
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@ -331,6 +331,9 @@ vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat nu
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if (data_format == AmdGpu::DataFormat::Format16 && num_format == AmdGpu::NumberFormat::Float) {
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return vk::Format::eR16Sfloat;
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}
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if (data_format == AmdGpu::DataFormat::Format32 && num_format == AmdGpu::NumberFormat::Float) {
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return vk::Format::eR32Sfloat;
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}
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UNREACHABLE_MSG("Unknown data_format={} and num_format={}", u32(data_format), u32(num_format));
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}
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