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image_view: Remove image format swizzle
* Platform support is not always guaranteed
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parent
3963ad93b1
commit
7d7352c1f2
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@ -749,7 +749,7 @@ void PatchImageInstruction(IR::Block& block, IR::Inst& inst, Info& info, Descrip
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}();
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inst.SetArg(1, coords);
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if (inst.GetOpcode() == IR::Opcode::ImageWrite && !image.CanSwizzleWithFormat()) {
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if (inst.GetOpcode() == IR::Opcode::ImageWrite) {
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inst.SetArg(2, SwizzleVector(ir, image, inst.Arg(2)));
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}
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@ -107,7 +107,7 @@ struct StageSpecialization {
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[](auto& spec, const auto& desc, AmdGpu::Image sharp) {
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spec.type = sharp.GetBoundType();
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spec.is_integer = AmdGpu::IsInteger(sharp.GetNumberFmt());
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if (desc.is_storage && !sharp.CanSwizzleWithFormat()) {
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if (desc.is_storage) {
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spec.dst_select = sharp.DstSelect();
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}
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});
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@ -208,14 +208,6 @@ struct Image {
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return dst_sel_x | (dst_sel_y << 3) | (dst_sel_z << 6) | (dst_sel_w << 9);
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}
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bool CanSwizzleWithFormat() const {
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// BGRA
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if (DstSelect() == 0b111100101110 && GetDataFmt() == DataFormat::Format8_8_8_8) {
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return true;
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}
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return false;
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}
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CompSwizzle GetSwizzle(u32 comp) const noexcept {
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const std::array select{dst_sel_x, dst_sel_y, dst_sel_z, dst_sel_w};
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return static_cast<CompSwizzle>(select[comp]);
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@ -50,34 +50,6 @@ vk::ComponentSwizzle ConvertComponentSwizzle(u32 dst_sel) {
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}
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}
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bool IsIdentityMapping(u32 dst_sel, u32 num_components) {
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return (num_components == 1 && dst_sel == 0b001'000'000'100) ||
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(num_components == 2 && dst_sel == 0b001'000'101'100) ||
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(num_components == 3 && dst_sel == 0b001'110'101'100) ||
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(num_components == 4 && dst_sel == 0b111'110'101'100);
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}
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vk::Format TrySwizzleFormat(vk::Format format, u32 dst_sel) {
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// BGRA
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if (dst_sel == 0b111100101110) {
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switch (format) {
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case vk::Format::eR8G8B8A8Unorm:
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return vk::Format::eB8G8R8A8Unorm;
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case vk::Format::eR8G8B8A8Snorm:
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return vk::Format::eB8G8R8A8Snorm;
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case vk::Format::eR8G8B8A8Uint:
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return vk::Format::eB8G8R8A8Uint;
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case vk::Format::eR8G8B8A8Sint:
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return vk::Format::eB8G8R8A8Sint;
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case vk::Format::eR8G8B8A8Srgb:
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return vk::Format::eB8G8R8A8Srgb;
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default:
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break;
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}
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}
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return format;
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}
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ImageViewInfo::ImageViewInfo(const AmdGpu::Image& image, const Shader::ImageResource& desc) noexcept
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: is_storage{desc.is_storage} {
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const auto dfmt = image.GetDataFmt();
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@ -120,12 +92,6 @@ ImageViewInfo::ImageViewInfo(const AmdGpu::Image& image, const Shader::ImageReso
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mapping.b = ConvertComponentSwizzle(image.dst_sel_z);
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mapping.a = ConvertComponentSwizzle(image.dst_sel_w);
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}
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// Check for unfortunate case of storage images being swizzled
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const u32 num_comps = AmdGpu::NumComponents(image.GetDataFmt());
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const u32 dst_sel = image.DstSelect();
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if (is_storage && !IsIdentityMapping(dst_sel, num_comps)) {
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format = TrySwizzleFormat(format, dst_sel);
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}
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}
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ImageViewInfo::ImageViewInfo(const AmdGpu::Liverpool::ColorBuffer& col_buffer) noexcept {
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