image_view: Remove image format swizzle

* Platform support is not always guaranteed
This commit is contained in:
IndecisiveTurtle 2024-12-13 20:20:27 +02:00
parent 3963ad93b1
commit 7d7352c1f2
4 changed files with 2 additions and 44 deletions

View file

@ -749,7 +749,7 @@ void PatchImageInstruction(IR::Block& block, IR::Inst& inst, Info& info, Descrip
}();
inst.SetArg(1, coords);
if (inst.GetOpcode() == IR::Opcode::ImageWrite && !image.CanSwizzleWithFormat()) {
if (inst.GetOpcode() == IR::Opcode::ImageWrite) {
inst.SetArg(2, SwizzleVector(ir, image, inst.Arg(2)));
}

View file

@ -107,7 +107,7 @@ struct StageSpecialization {
[](auto& spec, const auto& desc, AmdGpu::Image sharp) {
spec.type = sharp.GetBoundType();
spec.is_integer = AmdGpu::IsInteger(sharp.GetNumberFmt());
if (desc.is_storage && !sharp.CanSwizzleWithFormat()) {
if (desc.is_storage) {
spec.dst_select = sharp.DstSelect();
}
});

View file

@ -208,14 +208,6 @@ struct Image {
return dst_sel_x | (dst_sel_y << 3) | (dst_sel_z << 6) | (dst_sel_w << 9);
}
bool CanSwizzleWithFormat() const {
// BGRA
if (DstSelect() == 0b111100101110 && GetDataFmt() == DataFormat::Format8_8_8_8) {
return true;
}
return false;
}
CompSwizzle GetSwizzle(u32 comp) const noexcept {
const std::array select{dst_sel_x, dst_sel_y, dst_sel_z, dst_sel_w};
return static_cast<CompSwizzle>(select[comp]);

View file

@ -50,34 +50,6 @@ vk::ComponentSwizzle ConvertComponentSwizzle(u32 dst_sel) {
}
}
bool IsIdentityMapping(u32 dst_sel, u32 num_components) {
return (num_components == 1 && dst_sel == 0b001'000'000'100) ||
(num_components == 2 && dst_sel == 0b001'000'101'100) ||
(num_components == 3 && dst_sel == 0b001'110'101'100) ||
(num_components == 4 && dst_sel == 0b111'110'101'100);
}
vk::Format TrySwizzleFormat(vk::Format format, u32 dst_sel) {
// BGRA
if (dst_sel == 0b111100101110) {
switch (format) {
case vk::Format::eR8G8B8A8Unorm:
return vk::Format::eB8G8R8A8Unorm;
case vk::Format::eR8G8B8A8Snorm:
return vk::Format::eB8G8R8A8Snorm;
case vk::Format::eR8G8B8A8Uint:
return vk::Format::eB8G8R8A8Uint;
case vk::Format::eR8G8B8A8Sint:
return vk::Format::eB8G8R8A8Sint;
case vk::Format::eR8G8B8A8Srgb:
return vk::Format::eB8G8R8A8Srgb;
default:
break;
}
}
return format;
}
ImageViewInfo::ImageViewInfo(const AmdGpu::Image& image, const Shader::ImageResource& desc) noexcept
: is_storage{desc.is_storage} {
const auto dfmt = image.GetDataFmt();
@ -120,12 +92,6 @@ ImageViewInfo::ImageViewInfo(const AmdGpu::Image& image, const Shader::ImageReso
mapping.b = ConvertComponentSwizzle(image.dst_sel_z);
mapping.a = ConvertComponentSwizzle(image.dst_sel_w);
}
// Check for unfortunate case of storage images being swizzled
const u32 num_comps = AmdGpu::NumComponents(image.GetDataFmt());
const u32 dst_sel = image.DstSelect();
if (is_storage && !IsIdentityMapping(dst_sel, num_comps)) {
format = TrySwizzleFormat(format, dst_sel);
}
}
ImageViewInfo::ImageViewInfo(const AmdGpu::Liverpool::ColorBuffer& col_buffer) noexcept {