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Added S_ANDN2_B32 and S_NAND_B32 opcodes (#833)
* Added S_ANDN2_B32 and S_NAND_B32 opcodes * Update src/shader_recompiler/frontend/translate/scalar_alu.cpp Co-authored-by: baggins183 <baggins31084@proton.me> * Fix result and src1 Co-authored-by: baggins183 <baggins31084@proton.me> * update result Co-authored-by: baggins183 <baggins31084@proton.me> * Update src1 Co-authored-by: baggins183 <baggins31084@proton.me> --------- Co-authored-by: baggins183 <baggins31084@proton.me>
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@ -46,7 +46,11 @@ void Translator::EmitScalarAlu(const GcnInst& inst) {
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case Opcode::S_ADD_I32:
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return S_ADD_I32(inst);
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case Opcode::S_AND_B32:
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return S_AND_B32(inst);
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return S_AND_B32(NegateMode::None, inst);
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case Opcode::S_NAND_B32:
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return S_AND_B32(NegateMode::Result, inst);
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case Opcode::S_ANDN2_B32:
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return S_AND_B32(NegateMode::Src1, inst);
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case Opcode::S_ASHR_I32:
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return S_ASHR_I32(inst);
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case Opcode::S_OR_B32:
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@ -381,10 +385,16 @@ void Translator::S_ADD_I32(const GcnInst& inst) {
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// TODO: Overflow flag
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}
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void Translator::S_AND_B32(const GcnInst& inst) {
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void Translator::S_AND_B32(NegateMode negate, const GcnInst& inst) {
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const IR::U32 src0{GetSrc(inst.src[0])};
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const IR::U32 src1{GetSrc(inst.src[1])};
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const IR::U32 result{ir.BitwiseAnd(src0, src1)};
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IR::U32 src1{GetSrc(inst.src[1])};
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if (negate == NegateMode::Src1) {
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src1 = ir.BitwiseNot(src1);
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}
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IR::U32 result{ir.BitwiseAnd(src0, src1)};
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if (negate == NegateMode::Result) {
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result = ir.BitwiseNot(result);
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}
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SetDst(inst.dst[0], result);
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ir.SetScc(ir.INotEqual(result, ir.Imm32(0)));
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}
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@ -84,7 +84,7 @@ public:
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void S_OR_B64(NegateMode negate, bool is_xor, const GcnInst& inst);
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void S_AND_B64(NegateMode negate, const GcnInst& inst);
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void S_ADD_I32(const GcnInst& inst);
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void S_AND_B32(const GcnInst& inst);
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void S_AND_B32(NegateMode negate, const GcnInst& inst);
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void S_ASHR_I32(const GcnInst& inst);
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void S_OR_B32(const GcnInst& inst);
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void S_LSHR_B32(const GcnInst& inst);
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