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hotfix: Fix mipmap query for images

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This commit is contained in:
IndecisiveTurtle 2024-09-22 19:17:54 +03:00
parent 1a82b1d132
commit 50968c8b0c
2 changed files with 5 additions and 5 deletions
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6
src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
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@ -164,13 +164,13 @@ Id EmitImageFetch(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, const
return ctx.OpBitcast(ctx.F32[4], texel); return ctx.OpBitcast(ctx.F32[4], texel);
} }
Id EmitImageQueryDimensions(EmitContext& ctx, IR::Inst* inst, u32 handle, Id lod, bool skip_mips) { Id EmitImageQueryDimensions(EmitContext& ctx, IR::Inst* inst, u32 handle, Id lod, bool has_mips) {
const auto& texture = ctx.images[handle & 0xFFFF]; const auto& texture = ctx.images[handle & 0xFFFF];
const Id image = ctx.OpLoad(texture.image_type, texture.id); const Id image = ctx.OpLoad(texture.image_type, texture.id);
const auto type = ctx.info.images[handle & 0xFFFF].type; const auto type = ctx.info.images[handle & 0xFFFF].type;
const Id zero = ctx.u32_zero_value; const Id zero = ctx.u32_zero_value;
const auto mips{[&] { return skip_mips ? zero : ctx.OpImageQueryLevels(ctx.U32[1], image); }}; const auto mips{[&] { return has_mips ? ctx.OpImageQueryLevels(ctx.U32[1], image) : zero; }};
const bool uses_lod{type != AmdGpu::ImageType::Color2DMsaa}; const bool uses_lod{type != AmdGpu::ImageType::Color2DMsaa && !texture.is_storage};
const auto query{[&](Id type) { const auto query{[&](Id type) {
return uses_lod ? ctx.OpImageQuerySizeLod(type, image, lod) return uses_lod ? ctx.OpImageQuerySizeLod(type, image, lod)
: ctx.OpImageQuerySize(type, image); : ctx.OpImageQuerySize(type, image);

4
src/shader_recompiler/ir/passes/ssa_rewrite_pass.cpp
View file

@ -80,10 +80,10 @@ struct DefTable {
} }
const IR::Value& Def(IR::Block* block, ThreadBitScalar variable) { const IR::Value& Def(IR::Block* block, ThreadBitScalar variable) {
return block->ssa_sreg_values[RegIndex(variable.sgpr)]; return block->ssa_sbit_values[RegIndex(variable.sgpr)];
} }
void SetDef(IR::Block* block, ThreadBitScalar variable, const IR::Value& value) { void SetDef(IR::Block* block, ThreadBitScalar variable, const IR::Value& value) {
block->ssa_sreg_values[RegIndex(variable.sgpr)] = value; block->ssa_sbit_values[RegIndex(variable.sgpr)] = value;
} }
const IR::Value& Def(IR::Block* block, SccFlagTag) { const IR::Value& Def(IR::Block* block, SccFlagTag) {