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shader_recompiler: Implement S_ABS_I32 (#1713)
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@ -102,6 +102,8 @@ void Translator::EmitScalarAlu(const GcnInst& inst) {
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return S_SAVEEXEC_B64(NegateMode::None, false, inst);
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return S_SAVEEXEC_B64(NegateMode::None, false, inst);
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case Opcode::S_ORN2_SAVEEXEC_B64:
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case Opcode::S_ORN2_SAVEEXEC_B64:
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return S_SAVEEXEC_B64(NegateMode::Src1, true, inst);
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return S_SAVEEXEC_B64(NegateMode::Src1, true, inst);
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case Opcode::S_ABS_I32:
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return S_ABS_I32(inst);
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default:
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default:
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LogMissingOpcode(inst);
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LogMissingOpcode(inst);
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}
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}
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@ -620,6 +622,12 @@ void Translator::S_SAVEEXEC_B64(NegateMode negate, bool is_or, const GcnInst& in
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ir.SetScc(result);
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ir.SetScc(result);
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}
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}
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void Translator::S_ABS_I32(const GcnInst& inst) {
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const auto result = ir.IAbs(GetSrc(inst.src[0]));
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SetDst(inst.dst[0], result);
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ir.SetScc(ir.INotEqual(result, ir.Imm32(0)));
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}
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// SOPC
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// SOPC
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void Translator::S_CMP(ConditionOp cond, bool is_signed, const GcnInst& inst) {
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void Translator::S_CMP(ConditionOp cond, bool is_signed, const GcnInst& inst) {
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@ -113,6 +113,7 @@ public:
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void S_FF1_I32_B32(const GcnInst& inst);
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void S_FF1_I32_B32(const GcnInst& inst);
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void S_GETPC_B64(u32 pc, const GcnInst& inst);
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void S_GETPC_B64(u32 pc, const GcnInst& inst);
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void S_SAVEEXEC_B64(NegateMode negate, bool is_or, const GcnInst& inst);
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void S_SAVEEXEC_B64(NegateMode negate, bool is_or, const GcnInst& inst);
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void S_ABS_I32(const GcnInst& inst);
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// SOPC
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// SOPC
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void S_CMP(ConditionOp cond, bool is_signed, const GcnInst& inst);
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void S_CMP(ConditionOp cond, bool is_signed, const GcnInst& inst);
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