From 086c5802f4bec35ffa6457f287a4177537444965 Mon Sep 17 00:00:00 2001 From: Vladislav Mikhalin Date: Fri, 29 Nov 2024 23:13:36 +0300 Subject: [PATCH] Fixed DS_SWIZZLE_32 (#1619) --- src/shader_recompiler/frontend/translate/data_share.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/shader_recompiler/frontend/translate/data_share.cpp b/src/shader_recompiler/frontend/translate/data_share.cpp index 9685ee35..2f5932f8 100644 --- a/src/shader_recompiler/frontend/translate/data_share.cpp +++ b/src/shader_recompiler/frontend/translate/data_share.cpp @@ -158,13 +158,12 @@ void Translator::DS_WRITE(int bit_size, bool is_signed, bool is_pair, bool strid void Translator::DS_SWIZZLE_B32(const GcnInst& inst) { const u8 offset0 = inst.control.ds.offset0; const u8 offset1 = inst.control.ds.offset1; - const IR::U32 src{GetSrc(inst.src[1])}; + const IR::U32 src{GetSrc(inst.src[0])}; // ASSERT(offset1 & 0x80); const IR::U32 lane_id = ir.LaneId(); const IR::U32 id_in_group = ir.BitwiseAnd(lane_id, ir.Imm32(0b11)); const IR::U32 base = ir.ShiftLeftLogical(id_in_group, ir.Imm32(1)); - const IR::U32 index = - ir.IAdd(lane_id, ir.BitFieldExtract(ir.Imm32(offset0), base, ir.Imm32(2))); + const IR::U32 index = ir.BitFieldExtract(ir.Imm32(offset0), base, ir.Imm32(2)); SetDst(inst.dst[0], ir.QuadShuffle(src, index)); }